linux-kernel - Re: [PATCH v5 11/15] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC

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Message-ID: <Yqh4fO/OFW6DKmyX@sirena.org.uk>
Date:   Tue, 14 Jun 2022 13:01:00 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Brad Larson <brad@...sando.io>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mmc@...r.kernel.org, adrian.hunter@...el.com,
        alcooperx@...il.com, andy.shevchenko@...il.com, arnd@...db.de,
        blarson@....com, brijeshkumar.singh@....com,
        catalin.marinas@....com, gsomlo@...il.com, gerg@...ux-m68k.org,
        krzk@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        lee.jones@...aro.org, yamada.masahiro@...ionext.com,
        p.zabel@...gutronix.de, piotrs@...ence.com, p.yadav@...com,
        rdunlap@...radead.org, robh+dt@...nel.org, samuel@...lland.org,
        fancer.lancer@...il.com, suravee.suthikulpanit@....com,
        thomas.lendacky@....com, ulf.hansson@...aro.org, will@...nel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v5 11/15] spi: cadence-quadspi: Add compatible for AMD
 Pensando Elba SoC

On Mon, Jun 13, 2022 at 12:56:54PM -0700, Brad Larson wrote:

> +	/*
> +	 * If a hazard exists between the APB and AHB interfaces, perform a
> +	 * dummy readback from the controller to ensure synchronization.
> +	 */
> +	if (cqspi->apb_ahb_hazard)
> +		(void)readl(reg_base + CQSPI_REG_INDIRECTWR);

You shouldn't need the cast here.

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