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Message-ID: <949c22c4-5f64-47cf-673c-14fcadcc1d27@arm.com>
Date: Wed, 15 Jun 2022 18:14:18 +0100
From: Robin Murphy <robin.murphy@....com>
To: yf.wang@...iatek.com, Yong Wu <yong.wu@...iatek.com>,
Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
"open list:MEDIATEK IOMMU DRIVER" <iommu@...ts.linux-foundation.org>,
"moderated list:MEDIATEK IOMMU DRIVER"
<linux-mediatek@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Cc: wsd_upstream@...iatek.com, Libo Kang <Libo.Kang@...iatek.com>,
Miles Chen <miles.chen@...iatek.com>,
Ning Li <ning.li@...iatek.com>
Subject: Re: [PATCH v9 2/3] iommu/mediatek: Rename MTK_IOMMU_TLB_ADDR to
MTK_IOMMU_ADDR
On 2022-06-15 17:12, yf.wang--- via iommu wrote:
> From: Yunfei Wang <yf.wang@...iatek.com>
>
> Rename MTK_IOMMU_TLB_ADDR to MTK_IOMMU_ADDR, and update MTK_IOMMU_ADDR
> definition for better generality.
>
> Signed-off-by: Ning Li <ning.li@...iatek.com>
> Signed-off-by: Yunfei Wang <yf.wang@...iatek.com>
> ---
> drivers/iommu/mtk_iommu.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index bb9dd92c9898..3d62399e8865 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -265,8 +265,8 @@ static const struct iommu_ops mtk_iommu_ops;
>
> static int mtk_iommu_hw_init(const struct mtk_iommu_data *data, unsigned int bankid);
>
> -#define MTK_IOMMU_TLB_ADDR(iova) ({ \
> - dma_addr_t _addr = iova; \
> +#define MTK_IOMMU_ADDR(addr) ({ \
> + unsigned long long _addr = addr; \
If phys_addr_t is 64-bit, then dma_addr_t is also 64-bit, so there is no
loss of generality from using an appropriate type - IOVAs have to fit
into dma_addr_t for iommu-dma, after all. However, since IOVAs also have
to fit into unsigned long in the general IOMMU API, as "addr" is here,
then this is still just as broken for 32-bit LPAE as the existing code is.
Thanks,
Robin.
> ((lower_32_bits(_addr) & GENMASK(31, 12)) | upper_32_bits(_addr));\
> })
>
> @@ -381,8 +381,8 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
> writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
> base + data->plat_data->inv_sel_reg);
>
> - writel_relaxed(MTK_IOMMU_TLB_ADDR(iova), base + REG_MMU_INVLD_START_A);
> - writel_relaxed(MTK_IOMMU_TLB_ADDR(iova + size - 1),
> + writel_relaxed(MTK_IOMMU_ADDR(iova), base + REG_MMU_INVLD_START_A);
> + writel_relaxed(MTK_IOMMU_ADDR(iova + size - 1),
> base + REG_MMU_INVLD_END_A);
> writel_relaxed(F_MMU_INV_RANGE, base + REG_MMU_INVALIDATE);
>
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