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Message-ID: <CAPDyKFrBWBKJvLZaZOgK9K3Td0ZNq_0vP=K5ERjja3OnQFCsNA@mail.gmail.com>
Date: Wed, 15 Jun 2022 10:32:52 -0700
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Mengqi Zhang <mengqi.zhang@...iatek.com>
Cc: chaotian.jing@...iatek.com, matthias.bgg@...il.com,
linux-mmc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
wenbin.mei@...iatek.com
Subject: Re: [RESEND V2] mmc: mediatek: wait dma stop bit reset to 0
On Thu, 9 Jun 2022 at 04:22, Mengqi Zhang <mengqi.zhang@...iatek.com> wrote:
>
> MediaTek IP requires that after dma stop, it need to wait this dma stop
> bit auto-reset to 0. When bus is in high loading state, it will take a
> while for the dma stop complete. If there is no waiting operation here,
> when program runs to clear fifo and reset, bus will hang.
>
> In addition, there should be no return in msdc_data_xfer_next() if
> there is data need be transferred, because no matter what error occurs
> here, it should continue to excute to the following mmc_request_done.
> Otherwise the core layer may wait complete forever.
>
> Signed-off-by: Mengqi Zhang <mengqi.zhang@...iatek.com>
Applied for fixes and by adding a stable tag, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/mtk-sd.c | 20 ++++++++++++--------
> 1 file changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> index 195dc897188b..9da4489dc345 100644
> --- a/drivers/mmc/host/mtk-sd.c
> +++ b/drivers/mmc/host/mtk-sd.c
> @@ -1356,7 +1356,7 @@ static void msdc_data_xfer_next(struct msdc_host *host, struct mmc_request *mrq)
> msdc_request_done(host, mrq);
> }
>
> -static bool msdc_data_xfer_done(struct msdc_host *host, u32 events,
> +static void msdc_data_xfer_done(struct msdc_host *host, u32 events,
> struct mmc_request *mrq, struct mmc_data *data)
> {
> struct mmc_command *stop;
> @@ -1376,7 +1376,7 @@ static bool msdc_data_xfer_done(struct msdc_host *host, u32 events,
> spin_unlock_irqrestore(&host->lock, flags);
>
> if (done)
> - return true;
> + return;
> stop = data->stop;
>
> if (check_data || (stop && stop->error)) {
> @@ -1385,12 +1385,15 @@ static bool msdc_data_xfer_done(struct msdc_host *host, u32 events,
> sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP,
> 1);
>
> + ret = readl_poll_timeout_atomic(host->base + MSDC_DMA_CTRL, val,
> + !(val & MSDC_DMA_CTRL_STOP), 1, 20000);
> + if (ret)
> + dev_dbg(host->dev, "DMA stop timed out\n");
> +
> ret = readl_poll_timeout_atomic(host->base + MSDC_DMA_CFG, val,
> !(val & MSDC_DMA_CFG_STS), 1, 20000);
> - if (ret) {
> - dev_dbg(host->dev, "DMA stop timed out\n");
> - return false;
> - }
> + if (ret)
> + dev_dbg(host->dev, "DMA inactive timed out\n");
>
> sdr_clr_bits(host->base + MSDC_INTEN, data_ints_mask);
> dev_dbg(host->dev, "DMA stop\n");
> @@ -1415,9 +1418,7 @@ static bool msdc_data_xfer_done(struct msdc_host *host, u32 events,
> }
>
> msdc_data_xfer_next(host, mrq);
> - done = true;
> }
> - return done;
> }
>
> static void msdc_set_buswidth(struct msdc_host *host, u32 width)
> @@ -2416,6 +2417,9 @@ static void msdc_cqe_disable(struct mmc_host *mmc, bool recovery)
> if (recovery) {
> sdr_set_field(host->base + MSDC_DMA_CTRL,
> MSDC_DMA_CTRL_STOP, 1);
> + if (WARN_ON(readl_poll_timeout(host->base + MSDC_DMA_CTRL, val,
> + !(val & MSDC_DMA_CTRL_STOP), 1, 3000)))
> + return;
> if (WARN_ON(readl_poll_timeout(host->base + MSDC_DMA_CFG, val,
> !(val & MSDC_DMA_CFG_STS), 1, 3000)))
> return;
> --
> 2.25.1
>
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