linux-kernel - Re: [PATCH] spi: microchip-core: fix passing zero to PTR

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Message-ID: <39d7b387-905b-d1a9-85da-ce30501be8e0@microchip.com>
Date:   Wed, 15 Jun 2022 12:51:58 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <broonie@...nel.org>, <Conor.Dooley@...rochip.com>
CC:     <Daire.McNamara@...rochip.com>, <Lewis.Hanly@...rochip.com>,
        <linux-riscv@...ts.infradead.org>, <linux-spi@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <dan.carpenter@...cle.com>
Subject: Re: [PATCH] spi: microchip-core: fix passing zero to PTR_ERR warning

On 15/06/2022 13:49, Mark Brown wrote:
> On Wed, Jun 15, 2022 at 12:42:27PM +0000, Conor.Dooley@...rochip.com wrote:
>> On 15/06/2022 13:37, Mark Brown wrote:
> 
>>>> But if spi->clk is NULL, this will return 0 from the probe
>>>> rather than returning an error?
>>>> If that's not what you meant, lmk
> 
>>> Oh, hang on - what error conditions can clk_get() return 0 in?  The
>>> documentation doesn't mention any...
> 
>> If !CONFIG_HAVE_CLK, (without which it won't boot on the coreplex)
>> but I don't think I can be sure that CONFIG_HAVE_CLK will /always/
>> be enabled for other uses of the FPGA.
> 
> That's not an error, that's returning NULL as a dummy clock.  The
> expectation is that the driver will proceed as though it has a clock.

Ahh, cool. I guess I'll just drop the null check entirely so & guard
against a div zero when I actually go to use the clock.
Thanks!
Conor