linux-kernel - Re: [PATCH 1/2] pinctrl: mediatek: common: add quirk for broken set/clr modes

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Date:   Wed, 15 Jun 2022 15:23:57 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Fabien Parent <fparent@...libre.com>
Cc:     Sean Wang <sean.wang@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        linux-mediatek@...ts.infradead.org, linux-gpio@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] pinctrl: mediatek: common: add quirk for broken
 set/clr modes

On Mon, May 30, 2022 at 2:35 PM Fabien Parent <fparent@...libre.com> wrote:

> On MT8365, the SET/CLR of the mode is broken and some pin modes won't
> be set correctly. Add a quirk for such SoCs, so that instead of using
> the SET/CLR register use the main R/W register
> to read/update/write the modes.
>
> Signed-off-by: Fabien Parent <fparent@...libre.com>

What is the state of this patch set? I see changes are requested by
Angelo, are they being addressed?

Yours,
Linus Walleij