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Message-Id: <20220616164303.790379-3-viorel.suman@nxp.com>
Date: Thu, 16 Jun 2022 19:42:51 +0300
From: Viorel Suman <viorel.suman@....com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Dmitry Torokhov <dmitry.torokhov@...il.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Dong Aisheng <aisheng.dong@....com>,
Fabio Estevam <festevam@...il.com>,
Shawn Guo <shawnguo@...nel.org>,
Stefan Agner <stefan@...er.ch>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Linus Walleij <linus.walleij@...aro.org>,
Alessandro Zummo <a.zummo@...ertech.it>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Amit Kucheria <amitk@...nel.org>,
Zhang Rui <rui.zhang@...el.com>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>,
Sascha Hauer <s.hauer@...gutronix.de>,
NXP Linux Team <linux-imx@....com>,
Abel Vesa <abelvesa@...nel.org>,
Viorel Suman <viorel.suman@....com>,
Oliver Graute <oliver.graute@...oconnector.com>,
Mirela Rabulea <mirela.rabulea@....com>,
Peng Fan <peng.fan@....com>, Liu Ying <victor.liu@....com>,
Ming Qian <ming.qian@....com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-input@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-rtc@...r.kernel.org, linux-pm@...r.kernel.org,
linux-watchdog@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: Abel Vesa <abel.vesa@....com>
Subject: [PATCH v5 02/14] dt-bindings: clk: imx: Add fsl,scu-clk yaml file
From: Abel Vesa <abel.vesa@....com>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'clock' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@....com>
Signed-off-by: Viorel Suman <viorel.suman@....com>
---
.../bindings/clock/fsl,scu-clk.yaml | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
new file mode 100644
index 000000000000..8b59758eee4a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol
+
+maintainers:
+ - Abel Vesa <abel.vesa@....com>
+
+description: i.MX SCU Client Device Node
+ Client nodes are maintained as children of the relevant IMX-SCU device node.
+ This binding uses the common clock binding.
+ (Documentation/devicetree/bindings/clock/clock-bindings.txt)
+ The clock consumer should specify the desired clock by having the clock
+ ID in its "clocks" phandle cell.
+ See the full list of clock IDs from
+ include/dt-bindings/clock/imx8qxp-clock.h
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,imx8dxl-clk
+ - fsl,imx8qm-clk
+ - fsl,imx8qxp-clk
+ - const: fsl,scu-clk
+
+ '#clock-cells':
+ const: 2
+
+ clocks:
+ items:
+ - description: XTAL 32KHz
+ - description: XTAL 24MHz
+ minItems: 1
+
+ clock-names:
+ items:
+ enum:
+ - xtal_32KHz
+ - xtal_24Mhz
+ minItems: 1
+ maxItems: 2
+
+required:
+ - compatible
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller {
+ compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
+ #clock-cells = <2>;
+ };
--
2.25.1
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