linux-kernel - Re: [RESEND v8 02/19] clk: mediatek: reset: Fix written reset bit offset

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Message-Id: <20220616015031.4CC31C3411E@smtp.kernel.org>
Date:   Wed, 15 Jun 2022 18:50:28 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Rex-BC Chen <rex-bc.chen@...iatek.com>,
        krzysztof.kozlowski+dt@...aro.org, matthias.bgg@...il.com,
        mturquette@...libre.com, robh+dt@...nel.org
Cc:     p.zabel@...gutronix.de, angelogioacchino.delregno@...labora.com,
        nfraprado@...labora.com, chun-jie.chen@...iatek.com,
        wenst@...omium.org, runyang.chen@...iatek.com,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com,
        Rex-BC Chen <rex-bc.chen@...iatek.com>
Subject: Re: [RESEND v8 02/19] clk: mediatek: reset: Fix written reset bit offset

Quoting Rex-BC Chen (2022-05-23 02:33:29)
> Original assert/deassert bit is BIT(0), but it's more resonable to modify
> them to BIT(id % 32) which is based on id.
> 
> This patch will not influence any previous driver because the reset is
> only used for thermal. The id (MT8183_INFRACFG_AO_THERM_SW_RST) is 0.
> 
> Fixes: 64ebb57a3df6 ("clk: reset: Modify reset-controller driver")
> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
> Tested-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
> ---

Applied to clk-next