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Message-ID: <ddbaa8fa-dff5-671d-c476-fe8fd616587f@linaro.org>
Date: Thu, 16 Jun 2022 15:48:02 -0700
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
nicolas.ferre@...rochip.com, alexandre.belloni@...tlin.com,
claudiu.beznea@...rochip.com, UNGLinuxDriver@...rochip.com
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/3] dt-bindings: mfd: atmel,flexcom: Add new
compatible string for lan966x
On 12/06/2022 08:26, Kavyasree Kotagiri wrote:
> LAN966x SoC flexcoms has two optional I/O lines. Namely, CS0 and CS1
> in flexcom SPI mode. CTS and RTS in flexcom USART mode. These pins
> can be mapped to lan966x FLEXCOM_SHARED[0-20] pins and usage depends on
> functions being configured.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
> ---
> v2 -> v3:
> - Add reg property of lan966x missed in v2.
>
> v1 -> v2:
> - Use allOf:if:then for lan966x dt properties
>
> .../bindings/mfd/atmel,flexcom.yaml | 75 ++++++++++++++++++-
> 1 file changed, 73 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
> index cee9c93ce4b9..d9b0fe2b0211 100644
> --- a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
> +++ b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
> @@ -16,10 +16,13 @@ description:
>
> properties:
> compatible:
> - enum: atmel,sama5d2-flexcom
> + enum:
> + - atmel,sama5d2-flexcom
> + - microchip,lan966x-flexcom
And here you have correct syntax...
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
>
> clocks:
> maxItems: 1
> @@ -46,6 +49,27 @@ properties:
> $ref: /schemas/types.yaml#/definitions/uint32
> enum: [1, 2, 3]
>
> + microchip,flx-shrd-pins:
> + description: Specify the Flexcom shared pins to be used for flexcom
> + chip-selects.
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 1
> + maxItems: 2
> + items:
> + minimum: 0
> + maximum: 20
> +
> + microchip,flx-cs:
> + description: Flexcom chip selects. Here, value of '0' represents "cts" line
> + of flexcom USART or "cs0" line of flexcom SPI and value of '1' represents
> + "rts" line of flexcom USART or "cs1" line of flexcom SPI.
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 1
> + maxItems: 2
> + items:
> + minimum: 0
> + maximum: 1
> +
> patternProperties:
> "^serial@[0-9a-f]+$":
> description: See atmel-usart.txt for details of USART bindings.
> @@ -72,6 +96,25 @@ required:
> - ranges
> - atmel,flexcom-mode
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: microchip,lan966x-flexcom
> +
> + then:
> + properties:
> + reg:
> + minItems: 2
> + maxItems: 2
maxItems are not needed here.
> + items:
> + - description: Flexcom base regsiters map
> + - description: Flexcom shared registers map
> + required:
> + - microchip,flx-shrd-pins
> + - microchip,flx-cs
You need "else:" setting reg to maxItems:1 and disallowing the
properties (microchip,flx-cs:false). See for example:
https://elixir.bootlin.com/linux/v5.17-rc2/source/Documentation/devicetree/bindings/media/renesas,vsp1.yaml#L53
Best regards,
Krzysztof
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