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Message-ID: <5bc0a278-6a78-efec-f07b-a990830253f8@collabora.com>
Date: Thu, 16 Jun 2022 10:45:47 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Yong Wu <yong.wu@...iatek.com>
Cc: joro@...tes.org, will@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, matthias.bgg@...il.com,
iommu@...ts.linux-foundation.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
krzysztof.kozlowski@...aro.org
Subject: Re: [PATCH v3 6/6] iommu: mtk_iommu: Lookup phandle to retrieve
syscon to pericfg
Il 16/06/22 08:30, Yong Wu ha scritto:
> On Mon, 2022-06-13 at 10:13 +0200, AngeloGioacchino Del Regno wrote:
>> Il 13/06/22 07:32, Yong Wu ha scritto:
>>> On Thu, 2022-06-09 at 12:08 +0200, AngeloGioacchino Del Regno
>>> wrote:
>>>> On some SoCs (of which only MT8195 is supported at the time of
>>>> writing),
>>>> the "R" and "W" (I/O) enable bits for the IOMMUs are in the
>>>> pericfg_ao
>>>> register space and not in the IOMMU space: as it happened already
>>>> with
>>>> infracfg, it is expected that this list will grow.
>>>
>>> Currently I don't see the list will grow. As commented before, In
>>> the
>>> lastest SoC, The IOMMU enable bits for IOMMU will be in ATF, rather
>>> than in this pericfg register region. In this case, Is this patch
>>> unnecessary? or we could add this patch when there are 2 SoCs use
>>> this
>>> setting at least? what's your opinion?
>>>
>>
>> Perhaps I've misunderstood... besides, can you please check if
>> there's any
>> other SoC (not just chromebooks, also smartphone SoCs) that need this
>> logic?
>
> As far as I know, SmartPhone SoCs don't enable the infra iommu until
> now. they don't have this logic. I don't object this patch, I think we
> could add it when at least 2 SoCs need this.
>
> Thanks very much for help improving here.
>
Many thanks for checking that! Now that everything is clear, I can safely
go on with pushing a v4 of this series.
Thanks again!
Angelo
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