linux-kernel - Re: [PATCH 2/3] riscv: Implement Zicbom-based cache management operations

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Message-ID: <20220616121157.GA11657@lst.de>
Date:   Thu, 16 Jun 2022 14:11:57 +0200
From:   Christoph Hellwig <hch@....de>
To:     Heiko Stübner <heiko@...ech.de>
Cc:     Christoph Hellwig <hch@....de>, palmer@...belt.com,
        paul.walmsley@...ive.com, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org, wefu@...hat.com, guoren@...nel.org,
        cmuellner@...ux.com, philipp.tomsich@...ll.eu, samuel@...lland.org,
        atishp@...shpatra.org, anup@...infault.org, mick@....forth.gr,
        robh+dt@...nel.org, krzk+dt@...nel.org, devicetree@...r.kernel.org,
        drew@...gleboard.org, Atish Patra <atish.patra@....com>
Subject: Re: [PATCH 2/3] riscv: Implement Zicbom-based cache management
 operations

On Thu, Jun 16, 2022 at 02:09:47PM +0200, Heiko Stübner wrote:
> My guess was that new platforms implementing cache-management will want
> to be non-coherent by default?

No.  Cache incoherent DMA is absolutely horrible and almost impossible
to get right for the corner cases.  It is a cost cutting measure seen on
cheap SOCs and mostly avoided for more enterprise grade products.