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Message-ID: <20220617130931.3rdaj4p3d54p4ynz@pengutronix.de>
Date: Fri, 17 Jun 2022 15:09:31 +0200
From: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
To: Conor.Dooley@...rochip.com
Cc: thierry.reding@...il.com, lee.jones@...aro.org,
Daire.McNamara@...rochip.com, linux-kernel@...r.kernel.org,
linux-pwm@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 0/2] Add support for Microchip's pwm fpga core
Hello,
On Fri, Jun 17, 2022 at 11:50:13AM +0000, Conor.Dooley@...rochip.com wrote:
> On 17/06/2022 12:44, Conor Dooley wrote:
> > Hey Uwe,
> > Got a ~v2~ v3 for you...
> > I added some comments explaining the calculations and a documentation link
> > so hopefully things are a bit easier to follow.
> >
> > Code wise, I went through and sorted out a bunch of issues that cycling
> > through the different periods/duties threw up. Along the way I found
> > some other problems - especially with the longer periods which I have
> > fixed. I also added a write to the sync register in the apply function,
> > which will resolve to a NOP for channels without "shadow registers".
> >
> > Other than that, I managed to ditch the mchp_core_pwm_registers struct
> > entirely but had to add a short delay before reading back the registers
> > in order to compute the duty.
> >
> > Thanks,
> > Conor.
>
> *sigh* yet again I forgot to mention the potential maintainers conflict
> with spi-next..
I'm not a maintainer of a very active subsystem where MAINTAINER
conflicts are normal, but my expectation up to now was that conflicts in
that file are quite usual and trivial to resolve such that mentioning
these isn't very important.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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