linux-kernel - Re: [PATCH v3 08/16] mfd: axp20x: Add support for AXP192

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAHp75Ve7yyRfDOOcAbN1fQ9TNo-2okVr9jSyeEp8DfCY5K_wUg@mail.gmail.com>
Date:   Sun, 19 Jun 2022 12:44:14 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Aidan MacDonald <aidanmacdonald.0x0@...il.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Jonathan Cameron <jic23@...nel.org>,
        Lee Jones <lee.jones@...aro.org>,
        Sebastian Reichel <sre@...nel.org>,
        Mark Brown <broonie@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        Lars-Peter Clausen <lars@...afoo.de>,
        "Rafael J. Wysocki" <rafael@...nel.org>, quic_gurus@...cinc.com,
        Sebastian Reichel <sebastian.reichel@...labora.com>,
        Michael Walle <michael@...le.cc>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-iio <linux-iio@...r.kernel.org>,
        Linux PM <linux-pm@...r.kernel.org>
Subject: Re: [PATCH v3 08/16] mfd: axp20x: Add support for AXP192

On Sat, Jun 18, 2022 at 11:40 PM Aidan MacDonald
<aidanmacdonald.0x0@...il.com> wrote:
>
> The AXP192 PMIC is similar to the AXP202/AXP209, but with different
> regulators, additional GPIOs, and a different IRQ register layout.

...

> +static int axp192_get_irq_reg(unsigned int base_reg, int i)
> +{
> +       /* linear mapping for IRQ1 to IRQ4 */
> +       if (i < 4)
> +               return base_reg + i;
> +
> +       /* handle IRQ5 separately */
> +       if (base_reg == AXP192_IRQ1_EN)
> +               return AXP192_IRQ5_EN;

> +       else

Redundant 'else'.

> +               return AXP192_IRQ5_STATE;
> +}

...

> +enum {
> +       AXP192_DCDC1 = 0,
> +       AXP192_DCDC2,
> +       AXP192_DCDC3,
> +       AXP192_LDO1,
> +       AXP192_LDO2,
> +       AXP192_LDO3,
> +       AXP192_LDO_IO0,

> +       AXP192_REG_ID_MAX,

Comma is not needed for a terminator.

> +};

-- 
With Best Regards,
Andy Shevchenko