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Message-ID: <CAHp75VcMRAijXYGwVx8OPzMeafjT4Xa8rx_pRqRTs66Puw8qMA@mail.gmail.com>
Date: Sun, 19 Jun 2022 12:55:41 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Chen-Yu Tsai <wens@...e.org>,
Jonathan Cameron <jic23@...nel.org>,
Lee Jones <lee.jones@...aro.org>,
Sebastian Reichel <sre@...nel.org>,
Mark Brown <broonie@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Liam Girdwood <lgirdwood@...il.com>,
Lars-Peter Clausen <lars@...afoo.de>,
"Rafael J. Wysocki" <rafael@...nel.org>, quic_gurus@...cinc.com,
Sebastian Reichel <sebastian.reichel@...labora.com>,
Michael Walle <michael@...le.cc>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-iio <linux-iio@...r.kernel.org>,
Linux PM <linux-pm@...r.kernel.org>
Subject: Re: [PATCH v3 11/16] iio: adc: axp20x_adc: Add support for AXP192
On Sat, Jun 18, 2022 at 11:40 PM Aidan MacDonald
<aidanmacdonald.0x0@...il.com> wrote:
>
> The AXP192 is identical to the AXP20x, except for the addition of
> two more GPIO ADC channels.
...
> +static int axp192_write_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan, int val, int val2,
> + long mask)
> +{
> + struct axp20x_adc_iio *info = iio_priv(indio_dev);
> + unsigned int regmask, regval;
> +
> + /*
> + * The AXP192 PMIC allows the user to choose between 0V and 0.7V offsets
> + * for (independently) GPIO0-3 when in ADC mode.
> + */
> + if (mask != IIO_CHAN_INFO_OFFSET)
> + return -EINVAL;
> +
> + if (val != 0 && val != 700000)
> + return -EINVAL;
> + regval = val ? 1 : 0;
> +
As per comment against the previous patch use !!val directly?
> + switch (chan->channel) {
> + case AXP192_GPIO0_V:
> + regmask = AXP192_GPIO30_IN_RANGE_GPIO0;
> + regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO0, regval);
> + break;
> +
> + case AXP192_GPIO1_V:
> + regmask = AXP192_GPIO30_IN_RANGE_GPIO1;
> + regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO1, regval);
> + break;
> +
> + case AXP192_GPIO2_V:
> + regmask = AXP192_GPIO30_IN_RANGE_GPIO2;
> + regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO2, regval);
> + break;
> +
> + case AXP192_GPIO3_V:
> + regmask = AXP192_GPIO30_IN_RANGE_GPIO3;
> + regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO3, regval);
> + break;
> +
> + default:
> + return -EINVAL;
> + }
> +
> + return regmap_update_bits(info->regmap, AXP192_GPIO30_IN_RANGE, regmask, regval);
> +}
--
With Best Regards,
Andy Shevchenko
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