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Date: Sun, 19 Jun 2022 13:33:25 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Anurag Kumar Vulisha <anurag.kumar.vulisha@...inx.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Michal Simek <michal.simek@...inx.com>,
Matthias Brugger <matthias.bgg@...il.com>,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Sean Anderson <sean.anderson@...o.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH] dt-bindings: phy: make phy-cells description a text
The description field is a string, so using YAML inside phy-cells
description is not actually helpful. Make it a proper text.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
.../bindings/phy/mediatek,tphy.yaml | 14 ++++----
.../bindings/phy/mediatek,xsphy.yaml | 10 +++---
.../bindings/phy/xlnx,zynqmp-psgtr.yaml | 32 ++++++++-----------
3 files changed, 23 insertions(+), 33 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
index 4b638c1d4221..bd0e4c4915ed 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
@@ -154,14 +154,12 @@ patternProperties:
"#phy-cells":
const: 1
description: |
- The cells contain the following arguments.
-
- - description: The PHY type
- enum:
- - PHY_TYPE_USB2
- - PHY_TYPE_USB3
- - PHY_TYPE_PCIE
- - PHY_TYPE_SATA
+ The cells contain the following arguments::
+ - The PHY type::
+ - PHY_TYPE_USB2
+ - PHY_TYPE_USB3
+ - PHY_TYPE_PCIE
+ - PHY_TYPE_SATA
nvmem-cells:
items:
diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
index 598fd2b95c29..7262b8e184e2 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
@@ -100,12 +100,10 @@ patternProperties:
"#phy-cells":
const: 1
description: |
- The cells contain the following arguments.
-
- - description: The PHY type
- enum:
- - PHY_TYPE_USB2
- - PHY_TYPE_USB3
+ The cells contain the following arguments::
+ - The PHY type::
+ - PHY_TYPE_USB2
+ - PHY_TYPE_USB3
# The following optional vendor properties are only for debug or HQA test
mediatek,eye-src:
diff --git a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
index 79906519c652..7083eddb467c 100644
--- a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
+++ b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
@@ -18,25 +18,19 @@ properties:
"#phy-cells":
const: 4
description: |
- The cells contain the following arguments.
-
- - description: The GTR lane
- minimum: 0
- maximum: 3
- - description: The PHY type
- enum:
- - PHY_TYPE_DP
- - PHY_TYPE_PCIE
- - PHY_TYPE_SATA
- - PHY_TYPE_SGMII
- - PHY_TYPE_USB3
- - description: The PHY instance
- minimum: 0
- maximum: 1 # for DP, SATA or USB
- maximum: 3 # for PCIE or SGMII
- - description: The reference clock number
- minimum: 0
- maximum: 3
+ The cells contain the following arguments::
+ - The GTR lane (minimum:: 0, maximum:: 3)
+ - The PHY type::
+ - PHY_TYPE_DP
+ - PHY_TYPE_PCIE
+ - PHY_TYPE_SATA
+ - PHY_TYPE_SGMII
+ - PHY_TYPE_USB3
+ - The PHY instance::
+ minimum:: 0
+ maximum:: 1 # for DP, SATA or USB
+ maximum:: 3 # for PCIE or SGMII
+ - The reference clock number (minimum:: 0, maximum:: 3)
compatible:
enum:
--
2.34.1
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