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Date:   Mon, 20 Jun 2022 13:29:30 +0000
From:   Pierluigi Passaro <pierluigi.p@...iscite.com>
To:     Wolfram Sang <wsa@...nel.org>,
        Alexander Stein <alexander.stein@...tq-group.com>
CC:     Alifer Willians de Moraes <alifer.m@...iscite.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Eran Matityahu <eran.m@...iscite.com>,
        "festevam@...il.com" <festevam@...il.com>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "linux-imx@....com" <linux-imx@....com>,
        "linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
        "linux@...pel-privat.de" <linux@...pel-privat.de>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        gaopan <b54642@...escale.com>,
        Fugang Duan <B38611@...escale.com>,
        Vipul Kumar <vipul_kumar@...tor.com>
Subject: Re: [PATCH] i2c: imx: add irqf_no_suspend

Hi All,

> Hi everyone,

> > > The i2c irq is masked when pcie starts a i2c transfer process
> > > during noirq suspend stage. As a result, i2c transfer fails.
> > > To solve the problem, IRQF_NO_SUSPEND is added to i2c bus.
> > > 
> > > Signed-off-by: Gao Pan <b54642@...escale.com>
> > > Signed-off-by: Fugang Duan <B38611@...escale.com>
> > > Signed-off-by: Vipul Kumar <vipul_kumar@...tor.com>

> The SoB from Alifer Moraes is missing, too.

> > > goto rpm_disable;
> > > 
> > >      /* Request IRQ */
> > > -   ret = request_threaded_irq(irq, i2c_imx_isr, NULL, IRQF_SHARED,
> > > +   ret = request_threaded_irq(irq, i2c_imx_isr, NULL,
> > > +                              IRQF_SHARED | IRQF_NO_SUSPEND,
> > >                                 pdev->name, i2c_imx);
> > >      if (ret) {
> > >              dev_err(&pdev->dev, "can't claim irq %d\n", irq);
> > 
> > 
> > I stumbled across Documentation/power/suspend-and-interrupts.rst which states:
> > > For this reason, using IRQF_NO_SUSPEND and IRQF_SHARED at the
> > > same time should be avoided.
> > Given this IMHO at least a comment should be inserted why this is fine. I dont 
> > have a full picture about the situation, but to me it seems there is a 
> > reference missing, or why/how does some PCIe start some I2C transfer when the
> > controller is suspended already? Do I miss something?

This patch has been introduced to fix the following behavior.
HW conditions
- Variscite DART-MX8M on DT8MCustomBoard v2.x or higher.
- The PCIe connector uses a reset pin coming from a GPIO expander connected to the I2C bus.
SW behavior
- Upon wake-up, the PCIe try toggling the reset pins, but the GPIO expander / I2C bus are still suspended, leading to a PCIe wake-up failure.
>From our investigation, we can't identify a way to postpone PCIe wake-up after I2C wake-up.
This patch is still present in latest NXP kernel 5.15, but please let me know if you think this should be approached / fixed in a different way.

Thanks
Regards
Pier


> Thank you for this comment, Alexander. I second you, this needs
> explanation.

> Happy hacking,
>   Wolfram

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