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Date: Mon, 20 Jun 2022 21:06:00 +0100
From: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
To: broonie@...nel.org
Cc: agross@...nel.org, bjorn.andersson@...aro.org,
srinivas.kandagatla@...aro.org, bgoswami@...eaurora.org,
gregkh@...uxfoundation.org, rafael@...nel.org,
cw00.choi@...sung.com, krzysztof.kozlowski@...aro.org,
b.zolnierkie@...sung.com, myungjoo.ham@...sung.com,
michael@...le.cc, linus.walleij@...aro.org, brgl@...ev.pl,
tglx@...utronix.de, maz@...nel.org, lee.jones@...aro.org,
mani@...nel.org, cristian.ciocaltea@...il.com, wens@...e.org,
tharvey@...eworks.com, rjones@...eworks.com,
mazziesaccount@...il.com, orsonzhai@...il.com,
baolin.wang7@...il.com, zhang.lyra@...il.com,
jernej.skrabec@...il.com, samuel@...lland.org, lgirdwood@...il.com,
perex@...ex.cz, tiwai@...e.com, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-actions@...ts.infradead.org,
linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
alsa-devel@...a-project.org
Subject: [PATCH 05/49] mfd: qcom-pm8008: Convert irq chip to config regs
Use config registers to simplify the driver, putting all of the
code for irq type configuration in one place instead of splitting
it up arbitrarily between type and virtual registers.
Remove the initial register setting in pm8008_init(). The comment
indicates this is a hack to work around quirks in regmap-irq, but
this is not necessary if using config registers.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
---
drivers/mfd/qcom-pm8008.c | 76 +++++++++++----------------------------
1 file changed, 21 insertions(+), 55 deletions(-)
diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c
index c472d7f8103c..da16566f7883 100644
--- a/drivers/mfd/qcom-pm8008.c
+++ b/drivers/mfd/qcom-pm8008.c
@@ -73,15 +73,16 @@ static struct regmap_irq_sub_irq_map pm8008_sub_reg_offsets[] = {
REGMAP_IRQ_MAIN_REG_OFFSET(p3_offs),
};
-static unsigned int pm8008_virt_regs[] = {
+static unsigned int pm8008_config_regs[] = {
+ PM8008_TYPE_BASE,
PM8008_POLARITY_HI_BASE,
PM8008_POLARITY_LO_BASE,
};
enum {
+ SET_TYPE_INDEX,
POLARITY_HI_INDEX,
POLARITY_LO_INDEX,
- PM8008_NUM_VIRT_REGS,
};
static struct regmap_irq pm8008_irqs[] = {
@@ -95,32 +96,36 @@ static struct regmap_irq pm8008_irqs[] = {
REGMAP_IRQ_REG(PM8008_IRQ_GPIO2, PM8008_GPIO2, BIT(0)),
};
-static int pm8008_set_type_virt(unsigned int **virt_buf,
- unsigned int type, unsigned long hwirq,
- int reg)
+static int pm8008_set_type_config(unsigned int **buf, unsigned int type,
+ const struct regmap_irq *irq_data, int idx)
{
switch (type) {
case IRQ_TYPE_EDGE_FALLING:
case IRQ_TYPE_LEVEL_LOW:
- virt_buf[POLARITY_HI_INDEX][reg] &= ~pm8008_irqs[hwirq].mask;
- virt_buf[POLARITY_LO_INDEX][reg] |= pm8008_irqs[hwirq].mask;
+ buf[POLARITY_HI_INDEX][idx] &= ~irq_data->mask;
+ buf[POLARITY_LO_INDEX][idx] |= irq_data->mask;
break;
case IRQ_TYPE_EDGE_RISING:
case IRQ_TYPE_LEVEL_HIGH:
- virt_buf[POLARITY_HI_INDEX][reg] |= pm8008_irqs[hwirq].mask;
- virt_buf[POLARITY_LO_INDEX][reg] &= ~pm8008_irqs[hwirq].mask;
+ buf[POLARITY_HI_INDEX][idx] |= irq_data->mask;
+ buf[POLARITY_LO_INDEX][idx] &= ~irq_data->mask;
break;
case IRQ_TYPE_EDGE_BOTH:
- virt_buf[POLARITY_HI_INDEX][reg] |= pm8008_irqs[hwirq].mask;
- virt_buf[POLARITY_LO_INDEX][reg] |= pm8008_irqs[hwirq].mask;
+ buf[POLARITY_HI_INDEX][idx] |= irq_data->mask;
+ buf[POLARITY_LO_INDEX][idx] |= irq_data->mask;
break;
default:
return -EINVAL;
}
+ if (type & IRQ_TYPE_EDGE_BOTH)
+ buf[SET_TYPE_INDEX][idx] |= irq_data->mask;
+ else
+ buf[SET_TYPE_INDEX][idx] &= ~irq_data->mask;
+
return 0;
}
@@ -128,20 +133,19 @@ static struct regmap_irq_chip pm8008_irq_chip = {
.name = "pm8008_irq",
.main_status = I2C_INTR_STATUS_BASE,
.num_main_regs = 1,
- .num_virt_regs = PM8008_NUM_VIRT_REGS,
.irqs = pm8008_irqs,
.num_irqs = ARRAY_SIZE(pm8008_irqs),
.num_regs = PM8008_NUM_PERIPHS,
.not_fixed_stride = true,
.sub_reg_offsets = pm8008_sub_reg_offsets,
- .set_type_virt = pm8008_set_type_virt,
.status_base = PM8008_STATUS_BASE,
.mask_base = PM8008_MASK_BASE,
.unmask_base = PM8008_UNMASK_BASE,
- .type_base = PM8008_TYPE_BASE,
.ack_base = PM8008_ACK_BASE,
- .virt_reg_base = pm8008_virt_regs,
- .num_type_reg = PM8008_NUM_PERIPHS,
+ .config_base = pm8008_config_regs,
+ .num_config_bases = ARRAY_SIZE(pm8008_config_regs),
+ .num_config_regs = PM8008_NUM_PERIPHS,
+ .set_type_config = pm8008_set_type_config,
};
static struct regmap_config qcom_mfd_regmap_cfg = {
@@ -150,34 +154,6 @@ static struct regmap_config qcom_mfd_regmap_cfg = {
.max_register = 0xFFFF,
};
-static int pm8008_init(struct pm8008_data *chip)
-{
- int rc;
-
- /*
- * Set TEMP_ALARM peripheral's TYPE so that the regmap-irq framework
- * reads this as the default value instead of zero, the HW default.
- * This is required to enable the writing of TYPE registers in
- * regmap_irq_sync_unlock().
- */
- rc = regmap_write(chip->regmap,
- (PM8008_TEMP_ALARM_ADDR | INT_SET_TYPE_OFFSET),
- BIT(0));
- if (rc)
- return rc;
-
- /* Do the same for GPIO1 and GPIO2 peripherals */
- rc = regmap_write(chip->regmap,
- (PM8008_GPIO1_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
- if (rc)
- return rc;
-
- rc = regmap_write(chip->regmap,
- (PM8008_GPIO2_ADDR | INT_SET_TYPE_OFFSET), BIT(0));
-
- return rc;
-}
-
static int pm8008_probe_irq_peripherals(struct pm8008_data *chip,
int client_irq)
{
@@ -185,20 +161,10 @@ static int pm8008_probe_irq_peripherals(struct pm8008_data *chip,
struct regmap_irq_type *type;
struct regmap_irq_chip_data *irq_data;
- rc = pm8008_init(chip);
- if (rc) {
- dev_err(chip->dev, "Init failed: %d\n", rc);
- return rc;
- }
-
for (i = 0; i < ARRAY_SIZE(pm8008_irqs); i++) {
type = &pm8008_irqs[i].type;
- type->type_reg_offset = pm8008_irqs[i].reg_offset;
- type->type_rising_val = pm8008_irqs[i].mask;
- type->type_falling_val = pm8008_irqs[i].mask;
- type->type_level_high_val = 0;
- type->type_level_low_val = 0;
+ type->type_reg_offset = pm8008_irqs[i].reg_offset;
if (type->type_reg_offset == PM8008_MISC)
type->types_supported = IRQ_TYPE_EDGE_RISING;
--
2.35.1
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