linux-kernel - [PATCH 43/49] mfd: qcom-pm8008: Enable mask

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Message-Id: <20220620200644.1961936-44-aidanmacdonald.0x0@gmail.com>
Date:   Mon, 20 Jun 2022 21:06:38 +0100
From:   Aidan MacDonald <aidanmacdonald.0x0@...il.com>
To:     broonie@...nel.org
Cc:     agross@...nel.org, bjorn.andersson@...aro.org,
        srinivas.kandagatla@...aro.org, bgoswami@...eaurora.org,
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Subject: [PATCH 43/49] mfd: qcom-pm8008: Enable mask_writeonly flag for irq chip

The PM8008 has separate set and clear registers for controlling
its interrupt masks. These are likely volatile registers which
read as 0, and writing a '1' bit sets or clears the corresponding
bit in the mask register.

The PM8008's regmap config doesn't enable a cache, so all register
access is already volatile. Adding the mask_writeonly flag should
reduce bus traffic by avoiding a read-modify-write on the mask
set/clear registers.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
---
 drivers/mfd/qcom-pm8008.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c
index 7bc6becfe7f4..c778f2f87a17 100644
--- a/drivers/mfd/qcom-pm8008.c
+++ b/drivers/mfd/qcom-pm8008.c
@@ -141,6 +141,7 @@ static struct regmap_irq_chip pm8008_irq_chip = {
 	.status_base		= PM8008_STATUS_BASE,
 	.mask_base		= PM8008_MASK_BASE,
 	.unmask_base		= PM8008_UNMASK_BASE,
+	.mask_writeonly		= true,
 	.ack_base		= PM8008_ACK_BASE,
 	.config_base		= pm8008_config_regs,
 	.num_config_bases	= ARRAY_SIZE(pm8008_config_regs),
-- 
2.35.1