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Message-ID: <CAK8P3a2enbvE9a5V=JpUFt7FfyDGLQHTWTszibqqLVoeiMAo5Q@mail.gmail.com>
Date: Mon, 20 Jun 2022 22:42:17 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Guo Ren <guoren@...nel.org>
Cc: Palmer Dabbelt <palmer@...osinc.com>,
Arnd Bergmann <arnd@...db.de>,
Peter Zijlstra <peterz@...radead.org>,
Waiman Long <longman@...hat.com>,
Boqun Feng <boqun.feng@...il.com>,
linux-riscv <linux-riscv@...ts.infradead.org>,
linux-arch <linux-arch@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH V5] riscv: Add qspinlock support
On Mon, Jun 20, 2022 at 5:54 PM <guoren@...nel.org> wrote:
> >+config RISCV_USE_QUEUED_SPINLOCKS
> + bool "Using queued spinlock instead of ticket-lock"
Maybe we can just make ARCH_USE_QUEUED_SPINLOCKS
user visible and give users the choice between the two generic
implementations across all architectures that support the qspinlock
variant.
In arch/riscv, you'd then just have a
select ARCH_HAVE_QUEUED_SPINLOCKS
diff --git a/arch/riscv/include/asm/spinlock.h
b/arch/riscv/include/asm/spinlock.h
> new file mode 100644
> index 000000000000..fd3fd09cff52
> --- /dev/null
> +++ b/arch/riscv/include/asm/spinlock.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __ASM_SPINLOCK_H
> +#define __ASM_SPINLOCK_H
> +
> +#ifdef CONFIG_ARCH_USE_QUEUED_SPINLOCKS
> +#include <asm/qspinlock.h>
> +#include <asm/qrwlock.h>
> +#else
> +#include <asm-generic/spinlock.h>
> +#endif
> +
Along the same lines:
I think I'd prefer the header changes to be done in the asm-generic
version of this file, so this can be shared across all architectures
that want to give the choice between ticket and queued spinlock.
Arnd
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