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Message-Id: <20220620124724.513898809@linuxfoundation.org>
Date: Mon, 20 Jun 2022 14:50:23 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Adam Ford <aford173@...il.com>,
Shawn Guo <shawnguo@...nel.org>
Subject: [PATCH 5.15 004/106] arm64: dts: imx8mn-beacon: Enable RTS-CTS on UART3
From: Adam Ford <aford173@...il.com>
commit 5446ff1a67160ad92d9aae9530846aa54750be36 upstream.
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail. Enable RTS and CTS pin muxing and enable
handshaking in the uart node.
Signed-off-by: Adam Ford <aford173@...il.com>
Signed-off-by: Shawn Guo <shawnguo@...nel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
@@ -176,6 +176,7 @@
pinctrl-0 = <&pinctrl_uart3>;
assigned-clocks = <&clk IMX8MN_CLK_UART3>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
+ uart-has-rtscts;
status = "okay";
};
@@ -259,6 +260,8 @@
fsl,pins = <
MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
+ MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
+ MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
>;
};
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