[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <SN6PR12MB2767FBF0848B906B9F0284D28EB39@SN6PR12MB2767.namprd12.prod.outlook.com>
Date: Tue, 21 Jun 2022 17:38:27 +0000
From: "Kalra, Ashish" <Ashish.Kalra@....com>
To: "Dr. David Alan Gilbert" <dgilbert@...hat.com>
CC: "x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-coco@...ts.linux.dev" <linux-coco@...ts.linux.dev>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"jroedel@...e.de" <jroedel@...e.de>,
"Lendacky, Thomas" <Thomas.Lendacky@....com>,
"hpa@...or.com" <hpa@...or.com>,
"ardb@...nel.org" <ardb@...nel.org>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"seanjc@...gle.com" <seanjc@...gle.com>,
"vkuznets@...hat.com" <vkuznets@...hat.com>,
"jmattson@...gle.com" <jmattson@...gle.com>,
"luto@...nel.org" <luto@...nel.org>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
"slp@...hat.com" <slp@...hat.com>,
"pgonda@...gle.com" <pgonda@...gle.com>,
"peterz@...radead.org" <peterz@...radead.org>,
"srinivas.pandruvada@...ux.intel.com"
<srinivas.pandruvada@...ux.intel.com>,
"rientjes@...gle.com" <rientjes@...gle.com>,
"dovmurik@...ux.ibm.com" <dovmurik@...ux.ibm.com>,
"tobin@....com" <tobin@....com>, "bp@...en8.de" <bp@...en8.de>,
"Roth, Michael" <Michael.Roth@....com>,
"vbabka@...e.cz" <vbabka@...e.cz>,
"kirill@...temov.name" <kirill@...temov.name>,
"ak@...ux.intel.com" <ak@...ux.intel.com>,
"tony.luck@...el.com" <tony.luck@...el.com>,
"marcorr@...gle.com" <marcorr@...gle.com>,
"sathyanarayanan.kuppuswamy@...ux.intel.com"
<sathyanarayanan.kuppuswamy@...ux.intel.com>,
"alpergun@...gle.com" <alpergun@...gle.com>,
"jarkko@...nel.org" <jarkko@...nel.org>
Subject: RE: [PATCH Part2 v6 06/49] x86/sev: Add helper functions for
RMPUPDATE and PSMASH instruction
[AMD Official Use Only - General]
Hello Dave,
>> /*
>> * The RMP entry format is not architectural. The format is defined
>> in PPR @@ -126,6 +128,15 @@ struct snp_guest_platform_data {
>> u64 secrets_gpa;
>> };
>>
>> +struct rmpupdate {
>> + u64 gpa;
>> + u8 assigned;
>> + u8 pagesize;
>> + u8 immutable;
>> + u8 rsvd;
>> + u32 asid;
>> +} __packed;
>I see above it says the RMP entry format isn't architectural; is this 'rmpupdate' structure? If not how is this going to get handled when we have a couple of SNP capable CPUs with different layouts?
Architectural implies that it is defined in the APM and shouldn't change in such a way as to not be backward compatible.
I probably think the wording here should be architecture independent or more precisely platform independent.
Thanks,
Ashish
Powered by blists - more mailing lists