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Message-ID: <SN6PR12MB2767FBF0848B906B9F0284D28EB39@SN6PR12MB2767.namprd12.prod.outlook.com>
Date:   Tue, 21 Jun 2022 17:38:27 +0000
From:   "Kalra, Ashish" <Ashish.Kalra@....com>
To:     "Dr. David Alan Gilbert" <dgilbert@...hat.com>
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Subject: RE: [PATCH Part2 v6 06/49] x86/sev: Add helper functions for
 RMPUPDATE and PSMASH instruction

[AMD Official Use Only - General]

Hello Dave,

>>  /*
>>   * The RMP entry format is not architectural. The format is defined 
>> in PPR @@ -126,6 +128,15 @@ struct snp_guest_platform_data {
>>  	u64 secrets_gpa;
>>  };
>>  
>> +struct rmpupdate {
>> +	u64 gpa;
>> +	u8 assigned;
>> +	u8 pagesize;
>> +	u8 immutable;
>> +	u8 rsvd;
>> +	u32 asid;
>> +} __packed;

>I see above it says the RMP entry format isn't architectural; is this 'rmpupdate' structure? If not how is this going to get handled when we have a couple of SNP capable CPUs with different layouts?

Architectural implies that it is defined in the APM and shouldn't change in such a way as to not be backward compatible. 
I probably think the wording here should be architecture independent or more precisely platform independent.

Thanks,
Ashish

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