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Message-ID: <3ac4c6f1-0655-b26d-5b89-c492f609a8bc@linaro.org>
Date: Tue, 21 Jun 2022 09:19:52 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
robh+dt@...nel.org, Nicolas.Ferre@...rochip.com,
Claudiu.Beznea@...rochip.com, krzysztof.kozlowski+dt@...aro.org
Cc: UNGLinuxDriver@...rochip.com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 2/3] dt-bindings: mfd: atmel,flexcom: Add new
compatible string for lan966x
On 20/06/2022 16:46, Kavyasree Kotagiri wrote:
> LAN966x SoC flexcoms has two optional I/O lines. Namely, CS0 and CS1
> in flexcom SPI mode. CTS and RTS in flexcom USART mode. These pins
> can be mapped to lan966x FLEXCOM_SHARED[0-20] pins and usage depends on
> functions being configured.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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