linux-kernel - Re: [External] [PATCH v9 9/9] KVM: VMX: enable IPI virtualization

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Message-ID: <9d5c66e6-bc27-026e-fca2-9863ec2bafbd@bytedance.com>
Date:   Tue, 21 Jun 2022 10:23:32 +0800
From:   Shenming Lu <lushenming@...edance.com>
To:     Chao Gao <chao.gao@...el.com>
Cc:     Zeng Guang <guang.zeng@...el.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Tony Luck <tony.luck@...el.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Kim Phillips <kim.phillips@....com>,
        Jarkko Sakkinen <jarkko@...nel.org>,
        Jethro Beekman <jethro@...tanix.com>,
        Kai Huang <kai.huang@...el.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org, Robert Hu <robert.hu@...el.com>,
        zhouyibo@...edance.com
Subject: Re: [External] [PATCH v9 9/9] KVM: VMX: enable IPI virtualization

On 20/06/2022 19:00, Chao Gao wrote:
> On Mon, Jun 20, 2022 at 06:02:32PM +0800, Shenming Lu wrote:
>>> +		if (enable_ipiv)
>>> +			tertiary_exec_controls_clearbit(vmx, TERTIARY_EXEC_IPI_VIRT);
>>> +	}
>>>    	vmx_update_msr_bitmap_x2apic(vcpu);
>>>    }
>>
>> Hi, just a small question here:
>>
>> It seems that we clear the TERTIARY_EXEC_IPI_VIRT bit before enabling
>> interception for APIC_ICR when deactivating APICv on some reason.
>> Is there any problem with this sequence?
> 
> Both are done before the next vCPU entry. As long as no guest code can
> run between them (APICv setting takes effect in guest), this sequence
> shouldn't have any problem.

OK. Thanks for reply,

Shenmimg