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Message-ID: <MW3PR12MB4411E3A3A8BD74191AC7754EBAB39@MW3PR12MB4411.namprd12.prod.outlook.com>
Date: Tue, 21 Jun 2022 11:34:19 +0000
From: "Gogada, Bharat Kumar" <bharat.kumar.gogada@....com>
To: Rob Herring <robh@...nel.org>,
Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
CC: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"michals@...inx.com" <michals@...inx.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: RE: [PATCH v5 1/2] dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root
Port
> On Sat, 18 Jun 2022 08:14:58 +0530, Bharat Kumar Gogada wrote:
> > Xilinx Versal Premium series has CPM5 block which supports Root Port
> > functionality at Gen5 speed.
> >
> > Add support for YAML schemas documentation for Versal CPM5 Root Port
> driver.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
> > ---
> > .../bindings/pci/xilinx-versal-cpm.yaml | 38 ++++++++++++++++++-
> > 1 file changed, 37 insertions(+), 1 deletion(-)
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m
> dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml:17:7:
> [warning] wrong indentation: expected 4 but found 6 (indentation)
>
> dtschema/dtc warnings/errors:
>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.ozlabs.org/patch/
>
> This check can fail if there are any dependencies. The base for a patch series
> is generally the most recent rc1.
>
> If you already ran 'make dt_binding_check' and didn't see the above error(s),
> then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit.
Hi Rob, will check and re submit.
Regards,
Bharat
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