| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 21 Jun 2022 22:57:24 +0800
From: Guo Ren <guoren@...nel.org>
To: kernel test robot <lkp@...el.com>
Cc: Palmer Dabbelt <palmer@...osinc.com>,
Arnd Bergmann <arnd@...db.de>,
Peter Zijlstra <peterz@...radead.org>,
Waiman Long <longman@...hat.com>,
Boqun Feng <boqun.feng@...il.com>, llvm@...ts.linux.dev,
kbuild-all@...ts.01.org,
linux-riscv <linux-riscv@...ts.infradead.org>,
linux-arch <linux-arch@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH V5] riscv: Add qspinlock support
Fixed: with "{}" protect to meet clang requirement.
diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
index 12debce235e5..492104d45a23 100644
--- a/arch/riscv/include/asm/cmpxchg.h
+++ b/arch/riscv/include/asm/cmpxchg.h
@@ -17,6 +17,23 @@
__typeof__(new) __new = (new); \
__typeof__(*(ptr)) __ret; \
switch (size) { \
+ case 2: { \
+ u32 temp; \
+ u32 shif = ((ulong)__ptr & 2) ? 16 : 0; \
+ u32 mask = 0xffff << shif; \
+ __ptr = (__typeof__(ptr))((ulong)__ptr & ~(ulong)2); \
+ __asm__ __volatile__ ( \
+ "0: lr.w %0, %2\n" \
+ " and %1, %0, %z3\n" \
+ " or %1, %1, %z4\n" \
+ " sc.w %1, %1, %2\n" \
+ " bnez %1, 0b\n" \
+ : "=&r" (__ret), "=&r" (temp), "+A" (*__ptr) \
+ : "rJ" (~mask), "rJ" (__new << shif) \
+ : "memory"); \
+ __ret = (__ret & mask) >> shif; \
+ break; \
+ } \
case 4: \
__asm__ __volatile__ ( \
" amoswap.w %0, %2, %1\n" \
On Tue, Jun 21, 2022 at 3:58 AM kernel test robot <lkp@...el.com> wrote:
>
> Hi,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on soc/for-next]
> [also build test ERROR on linus/master v5.19-rc2 next-20220617]
> [cannot apply to tip/locking/core]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/intel-lab-lkp/linux/commits/guoren-kernel-org/riscv-Add-qspinlock-support/20220620-235653
> base: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git for-next
> config: riscv-rv32_defconfig (https://download.01.org/0day-ci/archive/20220621/202206210303.Vjl4rpPv-lkp@intel.com/config)
> compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project af6d2a0b6825e71965f3e2701a63c239fa0ad70f)
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install riscv cross compiling tool for clang build
> # apt-get install binutils-riscv-linux-gnu
> # https://github.com/intel-lab-lkp/linux/commit/326f4a13941845b6ef1c4f4eaba049fe265f52bf
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review guoren-kernel-org/riscv-Add-qspinlock-support/20220620-235653
> git checkout 326f4a13941845b6ef1c4f4eaba049fe265f52bf
> # save the config file
> mkdir build_dir && cp config build_dir/.config
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv prepare
>
> If you fix the issue, kindly add following tag where applicable
> Reported-by: kernel test robot <lkp@...el.com>
>
> All error/warnings (new ones prefixed by >>):
>
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:7:
> In file included from include/linux/gfp.h:6:
> In file included from include/linux/mmzone.h:8:
> In file included from include/linux/spinlock.h:62:
> In file included from include/linux/lockdep.h:14:
> In file included from include/linux/smp.h:13:
> In file included from include/linux/cpumask.h:13:
> In file included from include/linux/atomic.h:7:
> >> arch/riscv/include/asm/atomic.h:299:1: error: expected expression
> ATOMIC_OPS()
> ^
> arch/riscv/include/asm/atomic.h:292:2: note: expanded from macro 'ATOMIC_OPS'
> ATOMIC_OP(int, , 4)
> ^
> arch/riscv/include/asm/atomic.h:249:9: note: expanded from macro 'ATOMIC_OP'
> return __xchg_relaxed(&(v->counter), n, size); \
> ^
> arch/riscv/include/asm/cmpxchg.h:21:3: note: expanded from macro '__xchg_relaxed'
> u32 temp; \
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:7:
> In file included from include/linux/gfp.h:6:
> In file included from include/linux/mmzone.h:8:
> In file included from include/linux/spinlock.h:62:
> In file included from include/linux/lockdep.h:14:
> In file included from include/linux/smp.h:13:
> In file included from include/linux/cpumask.h:13:
> In file included from include/linux/atomic.h:7:
> >> arch/riscv/include/asm/atomic.h:299:1: error: use of undeclared identifier 'temp'; did you mean 'bcmp'?
> arch/riscv/include/asm/atomic.h:292:2: note: expanded from macro 'ATOMIC_OPS'
> ATOMIC_OP(int, , 4)
> ^
> arch/riscv/include/asm/atomic.h:249:9: note: expanded from macro 'ATOMIC_OP'
> return __xchg_relaxed(&(v->counter), n, size); \
> ^
> arch/riscv/include/asm/cmpxchg.h:31:28: note: expanded from macro '__xchg_relaxed'
> : "=&r" (__ret), "=&r" (temp), "+A" (*__ptr) \
> ^
> include/linux/string.h:159:12: note: 'bcmp' declared here
> extern int bcmp(const void *,const void *,__kernel_size_t);
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:7:
> In file included from include/linux/gfp.h:6:
> In file included from include/linux/mmzone.h:8:
> In file included from include/linux/spinlock.h:62:
> In file included from include/linux/lockdep.h:14:
> In file included from include/linux/smp.h:13:
> In file included from include/linux/cpumask.h:13:
> In file included from include/linux/atomic.h:7:
> >> arch/riscv/include/asm/atomic.h:299:1: error: invalid lvalue in asm output
> ATOMIC_OPS()
> ^~~~~~~~~~~~
> arch/riscv/include/asm/atomic.h:292:2: note: expanded from macro 'ATOMIC_OPS'
> ATOMIC_OP(int, , 4)
> ^~~~~~~~~~~~~~~~~~~~~
> arch/riscv/include/asm/atomic.h:249:9: note: expanded from macro 'ATOMIC_OP'
> return __xchg_relaxed(&(v->counter), n, size); \
> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> arch/riscv/include/asm/cmpxchg.h:31:28: note: expanded from macro '__xchg_relaxed'
> : "=&r" (__ret), "=&r" (temp), "+A" (*__ptr) \
> ^~~~
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:7:
> In file included from include/linux/gfp.h:6:
> In file included from include/linux/mmzone.h:8:
> In file included from include/linux/spinlock.h:62:
> In file included from include/linux/lockdep.h:14:
> In file included from include/linux/smp.h:13:
> In file included from include/linux/cpumask.h:13:
> In file included from include/linux/atomic.h:7:
> >> arch/riscv/include/asm/atomic.h:299:1: warning: mixing declarations and code is incompatible with standards before C99 [-Wdeclaration-after-statement]
> arch/riscv/include/asm/atomic.h:292:2: note: expanded from macro 'ATOMIC_OPS'
> ATOMIC_OP(int, , 4)
> ^
> arch/riscv/include/asm/atomic.h:249:9: note: expanded from macro 'ATOMIC_OP'
> return __xchg_relaxed(&(v->counter), n, size); \
> ^
> arch/riscv/include/asm/cmpxchg.h:22:7: note: expanded from macro '__xchg_relaxed'
> u32 shif = ((ulong)__ptr & 2) ? 16 : 0; \
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:700:
> In file included from include/linux/huge_mm.h:8:
> In file included from include/linux/fs.h:33:
> In file included from include/linux/percpu-rwsem.h:7:
> In file included from include/linux/rcuwait.h:6:
> In file included from include/linux/sched/signal.h:6:
> include/linux/signal.h:97:11: warning: array index 3 is past the end of the array (which contains 2 elements) [-Warray-bounds]
> return (set->sig[3] | set->sig[2] |
> ^ ~
> include/uapi/asm-generic/signal.h:62:2: note: array 'sig' declared here
> unsigned long sig[_NSIG_WORDS];
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:700:
> In file included from include/linux/huge_mm.h:8:
> In file included from include/linux/fs.h:33:
> In file included from include/linux/percpu-rwsem.h:7:
> In file included from include/linux/rcuwait.h:6:
> In file included from include/linux/sched/signal.h:6:
> include/linux/signal.h:97:25: warning: array index 2 is past the end of the array (which contains 2 elements) [-Warray-bounds]
> return (set->sig[3] | set->sig[2] |
> ^ ~
> include/uapi/asm-generic/signal.h:62:2: note: array 'sig' declared here
> unsigned long sig[_NSIG_WORDS];
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:700:
> In file included from include/linux/huge_mm.h:8:
> In file included from include/linux/fs.h:33:
> In file included from include/linux/percpu-rwsem.h:7:
> In file included from include/linux/rcuwait.h:6:
> In file included from include/linux/sched/signal.h:6:
> include/linux/signal.h:113:11: warning: array index 3 is past the end of the array (which contains 2 elements) [-Warray-bounds]
> return (set1->sig[3] == set2->sig[3]) &&
> ^ ~
> include/uapi/asm-generic/signal.h:62:2: note: array 'sig' declared here
> unsigned long sig[_NSIG_WORDS];
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:700:
> In file included from include/linux/huge_mm.h:8:
> In file included from include/linux/fs.h:33:
> In file included from include/linux/percpu-rwsem.h:7:
> In file included from include/linux/rcuwait.h:6:
> In file included from include/linux/sched/signal.h:6:
> include/linux/signal.h:113:27: warning: array index 3 is past the end of the array (which contains 2 elements) [-Warray-bounds]
> return (set1->sig[3] == set2->sig[3]) &&
> ^ ~
> include/uapi/asm-generic/signal.h:62:2: note: array 'sig' declared here
> unsigned long sig[_NSIG_WORDS];
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:700:
> In file included from include/linux/huge_mm.h:8:
> In file included from include/linux/fs.h:33:
> In file included from include/linux/percpu-rwsem.h:7:
> In file included from include/linux/rcuwait.h:6:
> In file included from include/linux/sched/signal.h:6:
> include/linux/signal.h:114:5: warning: array index 2 is past the end of the array (which contains 2 elements) [-Warray-bounds]
> (set1->sig[2] == set2->sig[2]) &&
> ^ ~
> include/uapi/asm-generic/signal.h:62:2: note: array 'sig' declared here
> unsigned long sig[_NSIG_WORDS];
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:700:
> In file included from include/linux/huge_mm.h:8:
> In file included from include/linux/fs.h:33:
> In file included from include/linux/percpu-rwsem.h:7:
> In file included from include/linux/rcuwait.h:6:
> In file included from include/linux/sched/signal.h:6:
> include/linux/signal.h:114:21: warning: array index 2 is past the end of the array (which contains 2 elements) [-Warray-bounds]
> (set1->sig[2] == set2->sig[2]) &&
> ^ ~
> include/uapi/asm-generic/signal.h:62:2: note: array 'sig' declared here
> unsigned long sig[_NSIG_WORDS];
> ^
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from include/linux/mm.h:700:
> In file included from include/linux/huge_mm.h:8:
> In file included from include/linux/fs.h:33:
> In file included from include/linux/percpu-rwsem.h:7:
> In file included from include/linux/rcuwait.h:6:
> In file included from include/linux/sched/signal.h:6:
> include/linux/signal.h:156:1: warning: array index 3 is past the end of the array (which contains 2 elements) [-Warray-bounds]
> _SIG_SET_BINOP(sigorsets, _sig_or)
> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> include/linux/signal.h:137:8: note: expanded from macro '_SIG_SET_BINOP'
> a3 = a->sig[3]; a2 = a->sig[2]; \
> ^ ~
>
>
> vim +299 arch/riscv/include/asm/atomic.h
>
> fab957c11efe2f Palmer Dabbelt 2017-07-10 298
> 5ce6c1f3535fa8 Andrea Parri 2018-03-09 @299 ATOMIC_OPS()
> fab957c11efe2f Palmer Dabbelt 2017-07-10 300
>
> --
> 0-DAY CI Kernel Test Service
> https://01.org/lkp
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Powered by blists - more mailing lists