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Message-Id: <20220621160621.24415-1-y.oudjana@protonmail.com>
Date:   Tue, 21 Jun 2022 20:06:15 +0400
From:   Yassine Oudjana <yassine.oudjana@...il.com>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Loic Poulain <loic.poulain@...aro.org>
Cc:     Yassine Oudjana <y.oudjana@...tonmail.com>,
        Yassine Oudjana <yassine.oudjana@...il.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>,
        Martin Botka <martin.botka@...ainline.org>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        Jami Kettunen <jami.kettunen@...ainline.org>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 0/6] clk: qcom: msm8996-cpu: Cleanup and migrate to parent_data

This series includes some cleanup of the MSM8996 CPU clock driver, as well as
migration from parent_names to parent_data for all of its clocks. The DT schema
is also fixed in this series to show the actual clocks consumed by the clock
controller and pass checks.

Yassine Oudjana (6):
  clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX
  clk: qcom: msm8996-cpu: Statically define PLL dividers
  clk: qcom: msm8996-cpu: Unify cluster order
  clk: qcom: msm8996-cpu: Convert secondary muxes to clk_regmap_mux
  dt-bindings: clock: qcom,msm8996-apcc: Fix clocks
  clk: qcom: msm8996-cpu: Use parent_data for all clocks

 .../bindings/clock/qcom,msm8996-apcc.yaml     |  15 +-
 drivers/clk/qcom/clk-cpu-8996.c               | 235 ++++++++++--------
 2 files changed, 140 insertions(+), 110 deletions(-)

-- 
2.36.1

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