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Message-Id: <20220621160621.24415-2-y.oudjana@protonmail.com>
Date: Tue, 21 Jun 2022 20:06:16 +0400
From: Yassine Oudjana <yassine.oudjana@...il.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Loic Poulain <loic.poulain@...aro.org>
Cc: Yassine Oudjana <y.oudjana@...tonmail.com>,
Yassine Oudjana <yassine.oudjana@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>,
Martin Botka <martin.botka@...ainline.org>,
Marijn Suijten <marijn.suijten@...ainline.org>,
Jami Kettunen <jami.kettunen@...ainline.org>,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 1/6] clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX
From: Yassine Oudjana <y.oudjana@...tonmail.com>
The parent at this index is the secondary mux, which can connect
not only to primary PLL/2 but also to XO. Rename the index to SMUX_INDEX
to better reflect the parent.
Signed-off-by: Yassine Oudjana <y.oudjana@...tonmail.com>
---
drivers/clk/qcom/clk-cpu-8996.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index 4a4fde8dd12d..5dc68dc3621f 100644
--- a/drivers/clk/qcom/clk-cpu-8996.c
+++ b/drivers/clk/qcom/clk-cpu-8996.c
@@ -61,7 +61,7 @@
#include "clk-regmap.h"
enum _pmux_input {
- DIV_2_INDEX = 0,
+ SMUX_INDEX = 0,
PLL_INDEX,
ACD_INDEX,
ALT_INDEX,
@@ -468,7 +468,7 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
case POST_RATE_CHANGE:
if (cnd->new_rate < DIV_2_THRESHOLD)
ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,
- DIV_2_INDEX);
+ SMUX_INDEX);
else
ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,
ACD_INDEX);
--
2.36.1
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