lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 22 Jun 2022 14:57:15 -0400
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Dave Hansen <dave.hansen@...el.com>,
        Maxim Levitsky <mlevitsk@...hat.com>,
        linux-kernel@...r.kernel.org
Cc:     "Chang S. Bae" <chang.seok.bae@...el.com>,
        Jiri Olsa <jolsa@...nel.org>, linux-perf-users@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>,
        "H. Peter Anvin" <hpa@...or.com>,
        "David S. Miller" <davem@...emloft.net>,
        Borislav Petkov <bp@...en8.de>,
        Kees Cook <keescook@...omium.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
        Jane Malalane <jane.malalane@...rix.com>,
        Tony Luck <tony.luck@...el.com>,
        Ingo Molnar <mingo@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        "open list:CRYPTO API" <linux-crypto@...r.kernel.org>,
        Paolo Bonzini <pbonzini@...hat.com>
Subject: Re: [PATCH 1/4] perf/x86/intel/lbr: use setup_clear_cpu_cap instead
 of clear_cpu_cap



On 6/22/2022 10:58 AM, Dave Hansen wrote:
> On 6/22/22 07:48, Maxim Levitsky wrote:
>> clear_cpu_cap(&boot_cpu_data) is very similar to setup_clear_cpu_cap
>> except that the latter also sets a bit in 'cpu_caps_cleared' which
>> later clears the same cap in secondary cpus, which is likely
>> what is meant here.
>>
>> Signed-off-by: Maxim Levitsky <mlevitsk@...hat.com>
> 
> Seems like a:
> 
> Fixes: 47125db27e47 ("perf/x86/intel/lbr: Support Architectural LBR")
> 
> would be in order.
> 
> Kan, does this change look right to you?

For the current implementation, the Arch LBR feature should be either 
supported by all the CPUs or disabled on all the CPUs. It cannot be only 
enabled for partial CPUs, even in a hybrid platform.
So the current code only check the boot CPU via static_cpu_has().

Ideally, Yes, I think it may be better to clear the bit for all CPUs, 
which makes the capability consistent among CPUs.

Thanks,
Kan
> 
>>   arch/x86/events/intel/lbr.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
>> index 13179f31fe10fa..b08715172309a7 100644
>> --- a/arch/x86/events/intel/lbr.c
>> +++ b/arch/x86/events/intel/lbr.c
>> @@ -1860,7 +1860,7 @@ void __init intel_pmu_arch_lbr_init(void)
>>   	return;
>>   
>>   clear_arch_lbr:
>> -	clear_cpu_cap(&boot_cpu_data, X86_FEATURE_ARCH_LBR);
>> +	setup_clear_cpu_cap(X86_FEATURE_ARCH_LBR);
>>   }
>>   
>>   /**
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ