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Message-ID: <20220622062245.21021-5-tinghan.shen@mediatek.com>
Date:   Wed, 22 Jun 2022 14:22:45 +0800
From:   Tinghan Shen <tinghan.shen@...iatek.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Peter Ujfalusi <peter.ujfalusi@...ux.intel.com>,
        Bard Liao <yung-chuan.liao@...ux.intel.com>,
        Ranjani Sridharan <ranjani.sridharan@...ux.intel.com>,
        Kai Vehmanen <kai.vehmanen@...ux.intel.com>,
        Daniel Baluta <daniel.baluta@....com>,
        "Mark Brown" <broonie@...nel.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>,
        Tinghan Shen <tinghan.shen@...iatek.com>,
        YC Hung <yc.hung@...iatek.com>,
        Curtis Malainey <cujomalainey@...omium.org>,
        "Allen-KH Cheng" <allen-kh.cheng@...iatek.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <sound-open-firmware@...a-project.org>,
        <alsa-devel@...a-project.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: [PATCH v4 4/4] ASoC: SOF: mediatek: Align mt8186 clock names with dt-bindings

Align clock names in mt8186 dsp driver with dt-bindings.

Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
---
 sound/soc/sof/mediatek/mt8186/mt8186-clk.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/sof/mediatek/mt8186/mt8186-clk.c b/sound/soc/sof/mediatek/mt8186/mt8186-clk.c
index 22220fd50b62..2df3b7ae1c6f 100644
--- a/sound/soc/sof/mediatek/mt8186/mt8186-clk.c
+++ b/sound/soc/sof/mediatek/mt8186/mt8186-clk.c
@@ -18,8 +18,8 @@
 #include "mt8186-clk.h"
 
 static const char *adsp_clks[ADSP_CLK_MAX] = {
-	[CLK_TOP_AUDIODSP] = "audiodsp_sel",
-	[CLK_TOP_ADSP_BUS] = "adsp_bus_sel",
+	[CLK_TOP_AUDIODSP] = "audiodsp",
+	[CLK_TOP_ADSP_BUS] = "adsp_bus",
 };
 
 int mt8186_adsp_init_clock(struct snd_sof_dev *sdev)
-- 
2.18.0

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