[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220622070600.gb3wep7rltwdivkk@pengutronix.de>
Date: Wed, 22 Jun 2022 09:06:00 +0200
From: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
shawnguo@...nel.org, s.hauer@...gutronix.de, festevam@...il.com,
linux-imx@....com, hvilleneuve@...onoff.com,
l.stach@...gutronix.de, abbaraju.manojsai@...rulasolutions.com,
jagan@...rulasolutions.com, matteo.lisi@...icam.com,
tharvey@...eworks.com, t.remmet@...tec.de, t.remmet@...tec.deh,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Peng Fan <peng.fan@....com>
Subject: Re: [PATCH 00/14] arm64: dts: imx8mp: correct pad settings
Hello,
On Wed, Jun 22, 2022 at 02:13:56PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@....com>
>
> i.MX8MP iomux pad BIT3 and BIT0 are reserved bits. Writing 1 to the
> reserved bit will be ignored and reading will still return 0. Although
> function not broken with reserved bits set, we should not set reserved
> bits.
I wonder how you found these. Some time ago I wrote a tool for such
issues[1]. Currently it only supports i.MX25, i.MX6DL and i.MX6Q, but
extending it for the other SoCs should be only some industious effort.
Best regards
Uwe
[1] https://git.pengutronix.de/cgit/tools/dt-utils/tree/src/dtblint-imx-pinmux.c
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)
Powered by blists - more mailing lists