linux-kernel - [PATCH v1 3/7] scsi: ufs-mediatek: Prevent host hang by setting CLK

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20220622073719.21599-4-stanley.chu@mediatek.com>
Date:   Wed, 22 Jun 2022 15:37:15 +0800
From:   Stanley Chu <stanley.chu@...iatek.com>
To:     <linux-scsi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <martin.petersen@...cle.com>, <avri.altman@....com>,
        <alim.akhtar@...sung.com>, <jejb@...ux.ibm.com>,
        <bvanassche@....org>
CC:     <peter.wang@...iatek.com>, <chun-hung.wu@...iatek.com>,
        <alice.chao@...iatek.com>, <powen.kao@...iatek.com>,
        <mason.zhang@...iatek.com>, <qilin.tan@...iatek.com>,
        <lin.gui@...iatek.com>, <eddie.huang@...iatek.com>,
        <tun-yu.yu@...iatek.com>, <cc.chou@...iatek.com>,
        <chaotian.jing@...iatek.com>, <jiajie.hao@...iatek.com>,
        <stanley.chu@...iatek.com>
Subject: [PATCH v1 3/7] scsi: ufs-mediatek: Prevent host hang by setting CLK_CG early

From: Peter Wang <peter.wang@...iatek.com>

Some UFSHCI hosts in MediaTek UFS platform need workaround
to prevent host hang issue by setting CLK_CG bit before
host is enabled.

This operation shall have no side effect on those platforms
which do not support this bit.

Reviewed-by: Stanley Chu <stanley.chu@...iatek.com>
Signed-off-by: Peter Wang <peter.wang@...iatek.com>
Signed-off-by: Stanley Chu <stanley.chu@...iatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 8 ++++++++
 drivers/ufs/host/ufs-mediatek.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index f76e2999ac99..d6b2734e7f81 100755
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -183,6 +183,14 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
 			hba->capabilities &= ~MASK_AUTO_HIBERN8_SUPPORT;
 			hba->ahit = 0;
 		}
+
+		/*
+		 * Turn on CLK_CG early to bypass abnormal ERR_CHK signal
+		 * to prevent host hang issue
+		 */
+		ufshcd_writel(hba,
+			      ufshcd_readl(hba, REG_UFS_XOUFS_CTRL) | 0x80,
+			      REG_UFS_XOUFS_CTRL);
 	}
 
 	return 0;
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 49a2137fb251..f5c1c643dd52 100755
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -12,6 +12,7 @@
 /*
  * Vendor specific UFSHCI Registers
  */
+#define REG_UFS_XOUFS_CTRL          0x140
 #define REG_UFS_REFCLK_CTRL         0x144
 #define REG_UFS_EXTREG              0x2100
 #define REG_UFS_MPHYCTRL            0x2200
-- 
2.18.0