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Date:   Wed, 22 Jun 2022 09:42:36 -0000
From:   "tip-bot2 for Shreenidhi Shedi" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Shreenidhi Shedi <sshedi@...are.com>, Borislav Petkov <bp@...e.de>,
        "Srivatsa S. Bhat (VMware)" <srivatsa@...il.mit.edu>,
        x86@...nel.org, linux-kernel@...r.kernel.org
Subject: [tip: x86/vmware] x86/vmware: Use BIT() macro for shifting

The following commit has been merged into the x86/vmware branch of tip:

Commit-ID:     4745ca43104b422354f06dc814d3f13661f217af
Gitweb:        https://git.kernel.org/tip/4745ca43104b422354f06dc814d3f13661f217af
Author:        Shreenidhi Shedi <sshedi@...are.com>
AuthorDate:    Wed, 01 Jun 2022 15:48:20 +05:30
Committer:     Borislav Petkov <bp@...e.de>
CommitterDate: Wed, 22 Jun 2022 11:23:14 +02:00

x86/vmware: Use BIT() macro for shifting

VMWARE_CMD_VCPU_RESERVED is bit 31 and that would mean undefined
behavior when shifting an int but the kernel is built with
-fno-strict-overflow which will wrap around using two's complement.

Use the BIT() macro to improve readability and avoid any potential
overflow confusion because it uses an unsigned long.

  [ bp: Clarify commit message. ]

Signed-off-by: Shreenidhi Shedi <sshedi@...are.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Reviewed-by: Srivatsa S. Bhat (VMware) <srivatsa@...il.mit.edu>
Link: https://lore.kernel.org/r/20220601101820.535031-1-sshedi@vmware.com
---
 arch/x86/kernel/cpu/vmware.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index c04b933..02039ec 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -476,8 +476,8 @@ static bool __init vmware_legacy_x2apic_available(void)
 {
 	uint32_t eax, ebx, ecx, edx;
 	VMWARE_CMD(GETVCPU_INFO, eax, ebx, ecx, edx);
-	return (eax & (1 << VMWARE_CMD_VCPU_RESERVED)) == 0 &&
-	       (eax & (1 << VMWARE_CMD_LEGACY_X2APIC)) != 0;
+	return !(eax & BIT(VMWARE_CMD_VCPU_RESERVED)) &&
+		(eax & BIT(VMWARE_CMD_LEGACY_X2APIC));
 }
 
 #ifdef CONFIG_AMD_MEM_ENCRYPT

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