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Message-ID: <20220622132302.267010-9-tmaimon77@gmail.com>
Date: Wed, 22 Jun 2022 16:22:52 +0300
From: Tomer Maimon <tmaimon77@...il.com>
To: <avifishman70@...il.com>, <tali.perry1@...il.com>,
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CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <linux-serial@...r.kernel.org>,
<linux-watchdog@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Tomer Maimon <tmaimon77@...il.com>
Subject: [PATCH v5 08/18] ARM: dts: nuvoton: add reset syscon property
Add nuvoton,sysgcr syscon property to the reset node to handle the general
control registers.
Signed-off-by: Tomer Maimon <tmaimon77@...il.com>
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index 3696980a3da1..8a2f29016291 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -110,6 +110,7 @@ rstc: rstc@...01000 {
compatible = "nuvoton,npcm750-reset";
reg = <0xf0801000 0x70>;
#reset-cells = <2>;
+ nuvoton,sysgcr = <&gcr>;
};
clk: clock-controller@...01000 {
--
2.33.0
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