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Message-ID: <20220623031541.1716745-1-george.cherian@marvell.com>
Date: Thu, 23 Jun 2022 08:45:41 +0530
From: George Cherian <george.cherian@...vell.com>
To: <linux-kernel@...r.kernel.org>
CC: <sgoutham@...vell.com>, <tglx@...utronix.de>,
George Cherian <george.cherian@...vell.com>
Subject: [PATCH] genirq: Increase the number of interrupters
Currently the maximum number of interrupters is capped at 8260 (64 +
8196) in most of the architectures were CONFIG_SPARSE_IRQ is selected.
This upper limit is not sufficient for couple of existing SoC's from
Marvell.
For eg: Octeon TX2 series of processors support a maximum of 32K
interrupters.
Bump up the upper limit from 8196 to 65536.
Signed-off-by: George Cherian <george.cherian@...vell.com>
---
kernel/irq/internals.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
index f09c60393e559..9bb42757d4afc 100644
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -12,7 +12,7 @@
#include <linux/sched/clock.h>
#ifdef CONFIG_SPARSE_IRQ
-# define IRQ_BITMAP_BITS (NR_IRQS + 8196)
+# define IRQ_BITMAP_BITS (NR_IRQS + 65536)
#else
# define IRQ_BITMAP_BITS NR_IRQS
#endif
--
2.25.1
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