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Message-ID: <YrP4qs+GIlaS7Wzy@matsya>
Date:   Thu, 23 Jun 2022 10:52:50 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Manivannan Sadhasivam <mani@...nel.org>,
        Jassi Brar <jassisinghbrar@...il.com>,
        Johan Hovold <johan+linaro@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] arm64: dts: qcom: add SC8280XP platform

On 07-06-22, 14:41, Bjorn Andersson wrote:

> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		CPU0: cpu@0 {
> +			device_type = "cpu";
> +			compatible = "qcom,kryo";

Generic kryo and not kryoxxx?

> +	firmware {
> +		scm: scm {
> +			compatible = "qcom,scm-sc8280xp", "qcom,scm";

I dont see patch documenting this compatible, was it added earlier, if
not pls add..

> +		};
> +	};
> +
> +	aggre1_noc: interconncet-aggre1-noc {

s/interconncet/interconnect

Hmmm I thought it was required that node name should be interconnect@x

> +		qup1: geniqup@...000 {
> +			compatible = "qcom,geni-se-qup";
> +			reg = <0 0x00ac0000 0 0x6000>;
> +			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
> +				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
> +			clock-names = "m-ahb", "s-ahb";
> +			iommus = <&apps_smmu 0x83 0>;
> +
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> +
> +			status = "disabled";
> +		};

why add this, if no i2c/spi/uarts are defined under this..?

> +		usb_0_hsphy: phy@...5000 {
> +			compatible = "qcom,sc8280xp-usb-hs-phy",
> +				     "qcom,usb-snps-hs-5nm-phy";
> +			reg = <0 0x088e5000 0 0x400>;

this doesn't match with node address above (I think W=1 would warn you
of such mismatches, useful to run on new dts

> +
> +		spmi_bus: spmi@...0000 {

Is the new v7 spmi or older one?

-- 
~Vinod

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