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Message-ID: <YrRJd2oBgpcVJ/M4@intel.intel>
Date: Thu, 23 Jun 2022 13:07:35 +0200
From: Andi Shyti <andi.shyti@...ux.intel.com>
To: Mauro Carvalho Chehab <mchehab@...nel.org>
Cc: Chris Wilson <chris.p.wilson@...el.com>,
Fei Yang <fei.yang@...el.com>,
Michał Winiarski <michal.winiarski@...el.com>,
Thomas Hellstrom <thomas.hellstrom@...el.com>,
Andi Shyti <andi.shyti@...ux.intel.com>,
Daniel Vetter <daniel@...ll.ch>,
Daniele Ceraolo Spurio <daniele.ceraolospurio@...el.com>,
Dave Airlie <airlied@...hat.com>,
David Airlie <airlied@...ux.ie>,
Jani Nikula <jani.nikula@...ux.intel.com>,
John Harrison <John.C.Harrison@...el.com>,
Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
Lucas De Marchi <lucas.demarchi@...el.com>,
Matt Roper <matthew.d.roper@...el.com>,
Matthew Auld <matthew.auld@...el.com>,
Rodrigo Vivi <rodrigo.vivi@...el.com>,
Tvrtko Ursulin <tvrtko.ursulin@...ux.intel.com>,
dri-devel@...ts.freedesktop.org, intel-gfx@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, mauro.chehab@...ux.intel.com,
stable@...r.kernel.org,
Thomas Hellström
<thomas.hellstrom@...ux.intel.com>
Subject: Re: [PATCH 2/6] drm/i915/gt: Invalidate TLB of the OA unit at TLB
invalidations
Hi Mauro,
On Wed, Jun 15, 2022 at 04:27:36PM +0100, Mauro Carvalho Chehab wrote:
> From: Chris Wilson <chris.p.wilson@...el.com>
>
> On gen12 HW, ensure that the TLB of the OA unit is also invalidated
> as just invalidating the TLB of an engine is not enough.
>
> Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
>
> Signed-off-by: Chris Wilson <chris.p.wilson@...el.com>
> Cc: Fei Yang <fei.yang@...el.com>
> Cc: Andi Shyti <andi.shyti@...ux.intel.com>
> Cc: stable@...r.kernel.org
> Acked-by: Thomas Hellström <thomas.hellstrom@...ux.intel.com>
> Signed-off-by: Mauro Carvalho Chehab <mchehab@...nel.org>
Reviewed-by: Andi Shyti <andi.shyti@...ux.intel.com>
Thanks,
Andi
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