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Message-ID: <YrRMF9fY46KJcMG/@intel.intel>
Date:   Thu, 23 Jun 2022 13:18:47 +0200
From:   Andi Shyti <andi.shyti@...ux.intel.com>
To:     Mauro Carvalho Chehab <mchehab@...nel.org>
Cc:     Chris Wilson <chris.p.wilson@...el.com>,
        Fei Yang <fei.yang@...el.com>,
        Michał Winiarski <michal.winiarski@...el.com>,
        Thomas Hellstrom <thomas.hellstrom@...el.com>,
        Thomas Hellström 
        <thomas.hellstrom@...ux.intel.com>,
        Andi Shyti <andi.shyti@...ux.intel.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Daniele Ceraolo Spurio <daniele.ceraolospurio@...el.com>,
        Dave Airlie <airlied@...hat.com>,
        David Airlie <airlied@...ux.ie>,
        Jani Nikula <jani.nikula@...ux.intel.com>,
        Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
        Lucas De Marchi <lucas.demarchi@...el.com>,
        Matt Roper <matthew.d.roper@...el.com>,
        Matthew Auld <matthew.auld@...el.com>,
        Rodrigo Vivi <rodrigo.vivi@...el.com>,
        Tvrtko Ursulin <tvrtko.ursulin@...ux.intel.com>,
        dri-devel@...ts.freedesktop.org, intel-gfx@...ts.freedesktop.org,
        linux-kernel@...r.kernel.org, mauro.chehab@...ux.intel.com,
        stable@...r.kernel.org
Subject: Re: [PATCH 6/6] drm/i915/gt: Serialize TLB invalidates with GT resets

Hi Mauro,

On Wed, Jun 15, 2022 at 04:27:40PM +0100, Mauro Carvalho Chehab wrote:
> From: Chris Wilson <chris.p.wilson@...el.com>
> 
> Avoid trying to invalidate the TLB in the middle of performing an
> engine reset, as this may result in the reset timing out. Currently,
> the TLB invalidate is only serialised by its own mutex, forgoing the
> uncore lock, but we can take the uncore->lock as well to serialise
> the mmio access, thereby serialising with the GDRST.
> 
> Tested on a NUC5i7RYB, BIOS RYBDWi35.86A.0380.2019.0517.1530 with
> i915 selftest/hangcheck.
> 
> Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
> 
> Reported-by: Mauro Carvalho Chehab <mchehab@...nel.org>
> Tested-by: Mauro Carvalho Chehab <mchehab@...nel.org>
> Reviewed-by: Mauro Carvalho Chehab <mchehab@...nel.org>
> Signed-off-by: Chris Wilson <chris.p.wilson@...el.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@...ux.intel.com>
> Cc: stable@...r.kernel.org
> Acked-by: Thomas Hellström <thomas.hellstrom@...ux.intel.com>
> Signed-off-by: Mauro Carvalho Chehab <mchehab@...nel.org>

Reviewed-by: Andi Shyti <andi.shyti@...ux.intel.com>

Thanks,
Andi

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