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Message-ID: <YrRUKD17Wtf5ik0r@eze-laptop>
Date: Thu, 23 Jun 2022 08:53:12 -0300
From: Ezequiel Garcia <ezequiel@...guardiasur.com.ar>
To: Nicolas Frattaroli <frattaroli.nicolas@...il.com>
Cc: Philipp Zabel <p.zabel@...gutronix.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Heiko Stuebner <heiko@...ech.de>, linux-media@...r.kernel.org,
linux-rockchip@...ts.infradead.org, linux-staging@...ts.linux.dev,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v5 2/3] media: hantro: Add support for RK356x encoder
Hi Nicolas,
On Sun, Jun 12, 2022 at 05:53:45PM +0200, Nicolas Frattaroli wrote:
> The RK3566 and RK3568 SoCs come with a small Hantro instance which is
> solely dedicated to encoding. This patch adds the necessary structs to
> the Hantro driver to allow the JPEG encoder of it to function.
>
> Through some sleuthing through the vendor's MPP source code and after
> closer inspection of the TRM, it was determined that the hardware likely
> supports VP8 and H.264 as well.
>
> Tested with the following GStreamer command:
>
> gst-launch-1.0 videotestsrc ! v4l2jpegenc ! matroskamux ! \
> filesink location=foo.mkv
>
> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@...il.com>
Reviewed-by: Ezequiel Garcia <ezequiel@...guardiasur.com.ar>
Thanks,
Ezequiel
> ---
> drivers/staging/media/hantro/hantro_drv.c | 1 +
> drivers/staging/media/hantro/hantro_hw.h | 1 +
> .../staging/media/hantro/rockchip_vpu_hw.c | 25 +++++++++++++++++++
> 3 files changed, 27 insertions(+)
>
> diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
> index ac232b5f7825..1112e8d0c821 100644
> --- a/drivers/staging/media/hantro/hantro_drv.c
> +++ b/drivers/staging/media/hantro/hantro_drv.c
> @@ -638,6 +638,7 @@ static const struct of_device_id of_hantro_match[] = {
> { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
> { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
> { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
> + { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, },
> { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
> #endif
> #ifdef CONFIG_VIDEO_HANTRO_IMX8M
> diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
> index 52a960f6fa4a..8c7eb5591446 100644
> --- a/drivers/staging/media/hantro/hantro_hw.h
> +++ b/drivers/staging/media/hantro/hantro_hw.h
> @@ -306,6 +306,7 @@ extern const struct hantro_variant rk3066_vpu_variant;
> extern const struct hantro_variant rk3288_vpu_variant;
> extern const struct hantro_variant rk3328_vpu_variant;
> extern const struct hantro_variant rk3399_vpu_variant;
> +extern const struct hantro_variant rk3568_vepu_variant;
> extern const struct hantro_variant rk3568_vpu_variant;
> extern const struct hantro_variant sama5d4_vdec_variant;
> extern const struct hantro_variant sunxi_vpu_variant;
> diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
> index fc96501f3bc8..b39813d53e57 100644
> --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
> +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
> @@ -417,6 +417,14 @@ static const struct hantro_codec_ops rk3399_vpu_codec_ops[] = {
> },
> };
>
> +static const struct hantro_codec_ops rk3568_vepu_codec_ops[] = {
> + [HANTRO_MODE_JPEG_ENC] = {
> + .run = rockchip_vpu2_jpeg_enc_run,
> + .reset = rockchip_vpu2_enc_reset,
> + .done = rockchip_vpu2_jpeg_enc_done,
> + },
> +};
> +
> /*
> * VPU variant.
> */
> @@ -439,6 +447,10 @@ static const struct hantro_irq rockchip_vpu2_irqs[] = {
> { "vdpu", rockchip_vpu2_vdpu_irq },
> };
>
> +static const struct hantro_irq rk3568_vepu_irqs[] = {
> + { "vepu", rockchip_vpu2_vepu_irq },
> +};
> +
> static const char * const rk3066_vpu_clk_names[] = {
> "aclk_vdpu", "hclk_vdpu",
> "aclk_vepu", "hclk_vepu"
> @@ -545,6 +557,19 @@ const struct hantro_variant rk3399_vpu_variant = {
> .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
> };
>
> +const struct hantro_variant rk3568_vepu_variant = {
> + .enc_offset = 0x0,
> + .enc_fmts = rockchip_vpu_enc_fmts,
> + .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts),
> + .codec = HANTRO_JPEG_ENCODER,
> + .codec_ops = rk3568_vepu_codec_ops,
> + .irqs = rk3568_vepu_irqs,
> + .num_irqs = ARRAY_SIZE(rk3568_vepu_irqs),
> + .init = rockchip_vpu_hw_init,
> + .clk_names = rockchip_vpu_clk_names,
> + .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
> +};
> +
> const struct hantro_variant rk3568_vpu_variant = {
> .dec_offset = 0x400,
> .dec_fmts = rk3399_vpu_dec_fmts,
> --
> 2.36.1
>
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