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Message-ID: <CA+V-a8smk8TqyWpm1KXo-3dKnCAodKsiYsaqnK_3ubfXE9YauQ@mail.gmail.com>
Date: Fri, 24 Jun 2022 10:59:40 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Rob Herring <robh@...nel.org>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Sagar Kadam <sagar.kadam@...ive.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
LKML <linux-kernel@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Phil Edworthy <phil.edworthy@...esas.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH RFC 1/2] dt-bindings: interrupt-controller: sifive,plic:
Document Renesas RZ/Five SoC
Hi Rob,
Thank you for the review.
On Sun, Jun 5, 2022 at 3:23 PM Rob Herring <robh@...nel.org> wrote:
>
> On Tue, May 24, 2022 at 06:22:13PM +0100, Lad Prabhakar wrote:
> > Document Renesas RZ/Five (R9A07G043) SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> > .../sifive,plic-1.0.0.yaml | 38 +++++++++++++++++--
> > 1 file changed, 35 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > index 27092c6a86c4..78ff31cb63e5 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > @@ -28,7 +28,10 @@ description:
> >
> > While the PLIC supports both edge-triggered and level-triggered interrupts,
> > interrupt handlers are oblivious to this distinction and therefore it is not
> > - specified in the PLIC device-tree binding.
> > + specified in the PLIC device-tree binding for SiFive PLIC (and similar PLIC's),
> > + but for the Renesas RZ/Five Soc (AX45MP AndesCore) which has NCEPLIC100 we need
> > + to specify the interrupt type as the flow for EDGE interrupts is different
> > + compared to LEVEL interrupts.
> >
> > While the RISC-V ISA doesn't specify a memory layout for the PLIC, the
> > "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that
> > @@ -57,6 +60,7 @@ properties:
> > - enum:
> > - allwinner,sun20i-d1-plic
> > - const: thead,c900-plic
> > + - const: renesas-r9a07g043-plic
> >
> > reg:
> > maxItems: 1
> > @@ -64,8 +68,7 @@ properties:
> > '#address-cells':
> > const: 0
> >
> > - '#interrupt-cells':
> > - const: 1
> > + '#interrupt-cells': true
> >
> > interrupt-controller: true
> >
> > @@ -91,6 +94,35 @@ required:
> > - interrupts-extended
> > - riscv,ndev
> >
> > +if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: renesas-r9a07g043-plic
> > +then:
> > + properties:
> > + clocks:
> > + maxItems: 1
> > +
> > + resets:
> > + maxItems: 1
> > +
> > + power-domains:
> > + maxItems: 1
>
> Did you test this? The above properties won't be allowed because of
> additionalProperties below. You need to change it to
> 'unevaluatedProperties' or move these to the top level.
>
Yes I have run the dt_binding check.
So with the below diff it does complain about the missing properties.
prasmi@...smi:~/work/renasas/renesas-drivers$ git diff
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
index 20ded037d444..bb14a4b1ec0a 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
@@ -130,7 +130,7 @@ examples:
plic: interrupt-controller@...0000 {
#address-cells = <0>;
#interrupt-cells = <1>;
- compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
+ compatible = "renesas-r9a07g043-plic";
interrupt-controller;
interrupts-extended = <&cpu0_intc 11>,
<&cpu1_intc 11>, <&cpu1_intc 9>,
prasmi@...smi:~/work/renasas/renesas-drivers$ make ARCH=riscv
CROSS_COMPILE=riscv64-linux-gnu- dt_binding_check
LINT Documentation/devicetree/bindings
CHKDT Documentation/devicetree/bindings/processed-schema.json
SCHEMA Documentation/devicetree/bindings/processed-schema.json
DTEX Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.example.dts
DTC Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.example.dtb
CHECK Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.example.dtb
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.example.dtb:
interrupt-controller@...0000: #interrupt-cells:0:0: 2 was expected
From schema:
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.example.dtb:
interrupt-controller@...0000: 'clocks' is a required property
From schema:
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.example.dtb:
interrupt-controller@...0000: 'resets' is a required property
From schema:
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.example.dtb:
interrupt-controller@...0000: 'power-domains' is a required property
From schema:
/home/prasmi/work/renasas/renesas-drivers/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
prasmi@...smi:~/work/renasas/renesas-drivers$
prasmi@...smi:~/work/renasas/renesas-drivers$
Is there something I'm missing here?
Cheers,
Prabhakar
> > +
> > + '#interrupt-cells':
> > + const: 2
> > +
> > + required:
> > + - clocks
> > + - resets
> > + - power-domains
> > +
> > +else:
> > + properties:
> > + '#interrupt-cells':
> > + const: 1
> > +
> > additionalProperties: false
> >
> > examples:
> > --
> > 2.25.1
> >
> >
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