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Message-ID: <ac9b9231-4bbd-bfae-c551-39123914a610@oss.nxp.com>
Date:   Sat, 25 Jun 2022 20:41:13 +0800
From:   "Peng Fan (OSS)" <peng.fan@....nxp.com>
To:     Rasmus Villemoes <rasmus.villemoes@...vas.dk>, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, shawnguo@...nel.org,
        s.hauer@...gutronix.de
Cc:     festevam@...il.com, linux-imx@....com, hvilleneuve@...onoff.com,
        l.stach@...gutronix.de, abbaraju.manojsai@...rulasolutions.com,
        jagan@...rulasolutions.com, matteo.lisi@...icam.com,
        tharvey@...eworks.com, t.remmet@...tec.de,
        u.kleine-koenig@...gutronix.de, t.remmet@...tec.deh,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Peng Fan <peng.fan@....com>
Subject: Re: [PATCH 00/14] arm64: dts: imx8mp: correct pad settings



在 2022/6/22 14:31, Rasmus Villemoes 写道:
> On 22/06/2022 08.13, Peng Fan (OSS) wrote:
>> From: Peng Fan <peng.fan@....com>
>>
>> i.MX8MP iomux pad BIT3 and BIT0 are reserved bits. Writing 1 to the
>> reserved bit will be ignored and reading will still return 0. Although
>> function not broken with reserved bits set, we should not set reserved
>> bits.
> Thank you, these have really been bugging my while trying to bring up an
> imx8mp-based board and adding the right pinmux settings - not knowing
> whether there was some undocumented effect from including one of those
> bits has led me astray more than once.
>
> One question: E.g. in patch 11, you change the setting from 0x49 to
> 0x40, which is of course exactly what the patch description says. But
> when bit 8 (PE) is not set, is there any effect from either setting of
> bit 6 (PUE)? Not that I suggest changing to 0x00, but I'm just curious.

Set PE/PUE, it depends on board design or whether need it. Because the 
previous settings not set them, I not set them also, just
not touch the reserved bits.

THanks,
Peng.

>
> For the series:
>
> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@...vas.dk>

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