linux-kernel - Re: [PATCH 2/5] dt-bindings: gpio: gpio-thunderx: Describe pin-cfg option

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Message-ID: <14b3fc53-e7da-a4e8-801a-29908bc03f55@linaro.org>
Date:   Sun, 26 Jun 2022 12:40:53 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Piyush Malgujar <pmalgujar@...vell.com>
Cc:     linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, brgl@...ev.pl, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, rric@...nel.org,
        cchavva@...vell.com, wsadowski@...vell.com
Subject: Re: [PATCH 2/5] dt-bindings: gpio: gpio-thunderx: Describe pin-cfg
 option

On 26/06/2022 00:59, Linus Walleij wrote:
> On Mon, Jun 13, 2022 at 10:04 AM Piyush Malgujar <pmalgujar@...vell.com> wrote:
> 
>> Thanks for the reply.
>> But as in this case, we expect a 32 bit reg value via DTS for this driver
>> only from user with internal understanding of marvell soc and this reg bit
>> value can have many different combinations as the register fields can vary
>> for different marvell SoCs.
>> This patch just reads the reg value from DTS and writes it to the register.
> 
> I understand that this is convenient but it does not use the right kernel
> abstractions and it does not use device tree bindings the right way
> either.
> 
> Rewrite the patches using definitions and fine control and move away
> from magic numbers to be poked into registers.

+1

Let's don't repeat the same pattern Samsung pinctrl has.

Best regards,
Krzysztof