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Message-ID: <20220627171500.GA2600685-robh@kernel.org>
Date:   Mon, 27 Jun 2022 11:15:00 -0600
From:   Rob Herring <robh@...nel.org>
To:     Conor.Dooley@...rochip.com
Cc:     fancer.lancer@...il.com, mail@...chuod.ie, airlied@...ux.ie,
        daniel@...ll.ch, krzysztof.kozlowski+dt@...aro.org,
        thierry.reding@...il.com, sam@...nborg.org,
        Eugeniy.Paltsev@...opsys.com, vkoul@...nel.org,
        lgirdwood@...il.com, broonie@...nel.org, daniel.lezcano@...aro.org,
        palmer@...belt.com, palmer@...osinc.com, tglx@...utronix.de,
        paul.walmsley@...ive.com, aou@...s.berkeley.edu,
        masahiroy@...nel.org, damien.lemoal@...nsource.wdc.com,
        geert@...ux-m68k.org, niklas.cassel@....com,
        dillon.minfei@...il.com, jee.heng.sia@...el.com,
        joabreu@...opsys.com, dri-devel@...ts.freedesktop.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        dmaengine@...r.kernel.org, alsa-devel@...a-project.org,
        linux-spi@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 06/14] spi: dt-bindings: dw-apb-ssi: update
 spi-{r,t}x-bus-width for dwc-ssi

On Mon, Jun 20, 2022 at 09:06:34PM +0000, Conor.Dooley@...rochip.com wrote:
> On 20/06/2022 21:56, Serge Semin wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > On Sat, Jun 18, 2022 at 01:30:28PM +0100, Conor Dooley wrote:
> >> From: Conor Dooley <conor.dooley@...rochip.com>
> >>
> >> snps,dwc-ssi-1.01a has a single user - the Canaan k210, which uses a
> >> width of 4 for spi-{r,t}x-bus-width. Update the binding to reflect
> >> this.
> >>
> >> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> >> ---
> >>  .../bindings/spi/snps,dw-apb-ssi.yaml         | 48 ++++++++++++++-----
> >>  1 file changed, 35 insertions(+), 13 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> >> index e25d44c218f2..f2b9e3f062cd 100644
> >> --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> >> +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> >> @@ -135,19 +135,41 @@ properties:
> >>        of the designware controller, and the upper limit is also subject to
> >>        controller configuration.
> >>
> >> -patternProperties:
> >> -  "^.*@[0-9a-f]+$":
> >> -    type: object
> >> -    properties:
> >> -      reg:
> >> -        minimum: 0
> >> -        maximum: 3
> >> -
> >> -      spi-rx-bus-width:
> >> -        const: 1
> >> -
> >> -      spi-tx-bus-width:
> >> -        const: 1
> >> +if:
> >> +  properties:
> >> +    compatible:
> >> +      contains:
> >> +        const: snps,dwc-ssi-1.01a
> >> +
> >> +then:
> >> +  patternProperties:
> >> +    "^.*@[0-9a-f]+$":
> >> +      type: object
> >> +      properties:
> >> +        reg:
> >> +          minimum: 0
> >> +          maximum: 3
> >> +
> >> +        spi-rx-bus-width:
> >> +          const: 4
> >> +
> >> +        spi-tx-bus-width:
> >> +          const: 4
> >> +
> >> +else:
> >> +  patternProperties:
> >> +    "^.*@[0-9a-f]+$":
> >> +      type: object
> >> +      properties:
> >> +        reg:
> >> +          minimum: 0
> >> +          maximum: 3
> >> +
> >> +        spi-rx-bus-width:
> >> +          const: 1
> >> +
> >> +        spi-tx-bus-width:
> >> +          const: 1
> > 
> > You can just use a more relaxed constraint "enum: [1 2 4 8]" here
> 
> 8 too? sure.

Then no constraints needed because the common definition already has 
this presumably.

Rob

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