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Message-ID: <20220627091217.21701-1-kavyasree.kotagiri@microchip.com>
Date:   Mon, 27 Jun 2022 14:42:17 +0530
From:   Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
To:     <arnd@...db.de>, <alexandre.belloni@...tlin.com>,
        <krzysztof.kozlowski+dt@...aro.org>, <soc@...nel.org>,
        <robh+dt@...nel.org>, <nicolas.ferre@...rochip.com>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <UNGLinuxDriver@...rochip.com>, <Kavyasree.Kotagiri@...rochip.com>
Subject: [PATCH] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.

On pcb8291, Flexcom3 usart has only tx and rx pins.
Cleaningup usart3 pinctrl settings.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
---
 arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
index 3c7e3a7d6f14..5dc8ed4cee9a 100644
--- a/arch/arm/boot/dts/lan966x-pcb8291.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
@@ -19,19 +19,13 @@
 };
 
 &gpio {
-	fc_shrd7_pins: fc_shrd7-pins {
-		pins = "GPIO_49";
-		function = "fc_shrd7";
-	};
-
-	fc_shrd8_pins: fc_shrd8-pins {
-		pins = "GPIO_54";
-		function = "fc_shrd8";
+	fc3_b_rxd_pins: fc3-b-rxd-pins {
+		pins = "GPIO_52";
+		function = "fc3_b";
 	};
 
-	fc3_b_pins: fcb3-spi-pins {
-		/* SCK, RXD, TXD */
-		pins = "GPIO_51", "GPIO_52", "GPIO_53";
+	fc3_b_txd_pins: fc3-b-txd-pins {
+		pins = "GPIO_53";
 		function = "fc3_b";
 	};
 
@@ -53,7 +47,7 @@
 	status = "okay";
 
 	usart3: serial@200 {
-		pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
+		pinctrl-0 = <&fc3_b_rxd_pins>, <&fc3_b_txd_pins>;
 		pinctrl-names = "default";
 		status = "okay";
 	};
-- 
2.17.1

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