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Message-ID: <a2251c18-790c-b1d2-e9cc-2d7bda2a20db@huawei.com>
Date: Tue, 28 Jun 2022 20:50:11 +0800
From: Hanjun Guo <guohanjun@...wei.com>
To: Jianmin Lv <lvjianmin@...ngson.cn>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>
CC: <linux-kernel@...r.kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
"Huacai Chen" <chenhuacai@...ngson.cn>
Subject: Re: [PATCH V13 01/13] APCI: irq: Add support for multiple GSI domains
On 2022/6/27 19:39, Jianmin Lv wrote:
> From: Marc Zyngier <maz@...nel.org>
>
> In an unfortunate departure from the ACPI spec, the LoongArch
> architecture split its GSI space across multiple interrupt
> controllers.
>
> In order to be able to reuse sthe core code and prevent
s/sthe/the
> architectures from reinventing an already square wheel, offer
> the arch code the ability to register a dispatcher function
> that will return the domain fwnode for a given GSI.
>
> The ARM GIC drivers are updated to support this (with a single
> domain, as intended).
>
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> Cc: Hanjun Guo <guohanjun@...wei.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Signed-off-by: Jianmin Lv <lvjianmin@...ngson.cn>
> ---
> drivers/acpi/irq.c | 40 +++++++++++++++++++++++++---------------
> drivers/irqchip/irq-gic-v3.c | 18 ++++++++++++------
> drivers/irqchip/irq-gic.c | 18 ++++++++++++------
> include/linux/acpi.h | 2 +-
Reviewed-by: Hanjun Guo <guohanjun@...wei.com>
I tested this patch on a GICv3 based ARM64 server, no
regressions were found,
Tested-by: Hanjun Guo <guohanjun@...wei.com>
Thanks
Hanjun
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