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Message-ID: <28110f9c-b84c-591a-d365-ae4412408e48@intel.com>
Date:   Tue, 28 Jun 2022 08:48:35 +0800
From:   Xiaoyao Li <xiaoyao.li@...el.com>
To:     Dave Hansen <dave.hansen@...el.com>,
        Kai Huang <kai.huang@...el.com>, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org
Cc:     seanjc@...gle.com, pbonzini@...hat.com, len.brown@...el.com,
        tony.luck@...el.com, rafael.j.wysocki@...el.com,
        reinette.chatre@...el.com, dan.j.williams@...el.com,
        peterz@...radead.org, ak@...ux.intel.com,
        kirill.shutemov@...ux.intel.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com,
        isaku.yamahata@...el.com
Subject: Re: [PATCH v5 15/22] x86/virt/tdx: Allocate and set up PAMTs for
 TDMRs

On 6/28/2022 4:41 AM, Dave Hansen wrote:
> On 6/27/22 03:31, Kai Huang wrote:
>>>> +/* Page sizes supported by TDX */
>>>> +enum tdx_page_sz {
>>>> +	TDX_PG_4K,
>>>> +	TDX_PG_2M,
>>>> +	TDX_PG_1G,
>>>> +	TDX_PG_MAX,
>>>> +};
>>> Are these the same constants as the magic numbers in Kirill's
>>> try_accept_one()?
>> try_accept_once() uses 'enum pg_level' PG_LEVEL_{4K,2M,1G} directly.  They can
>> be used directly too, but 'enum pg_level' has more than we need here:
> 
> I meant this:
> 
> +       switch (level) {
> +       case PG_LEVEL_4K:
> +               page_size = 0;
> +               break;
> 
> Because TDX_PG_4K==page_size==0, and for this:
> 
> +       case PG_LEVEL_2M:
> +               page_size = 1;

here we can just do

	page_size = level - 1;

or
	
	tdx_page_level = level - 1;

yes, TDX's page level definition is one level smaller of Linux's definition.

> where TDX_PG_2M==page_size==1
> 
> See?
> 
> Are Kirill's magic 0/1/2 numbers the same as
> 
> 	TDX_PG_4K,
> 	TDX_PG_2M,
> 	TDX_PG_1G,
> 
> ?



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