lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <cae295192fa149801ab2fa848a1606654d75cf39.1656396767.git.qinjian@cqplus1.com>
Date:   Tue, 28 Jun 2022 14:26:45 +0800
From:   Qin Jian <qinjian@...lus1.com>
To:     sboyd@...nel.org
Cc:     krzysztof.kozlowski+dt@...aro.org, robh+dt@...nel.org,
        mturquette@...libre.com, linux@...linux.org.uk, arnd@...db.de,
        olof@...om.net, soc@...nel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        Qin Jian <qinjian@...lus1.com>
Subject: [PATCH v20 05/11] clk: gate: Add devm_clk_hw_register_gate_parent_data()

Add devm_clk_hw_register_gate_parent_data() - devres-managed version
of clk_hw_register_gate_parent_data()

Signed-off-by: Qin Jian <qinjian@...lus1.com>
---
 include/linux/clk-provider.h | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index c10dc4c65..179346c5c 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -567,6 +567,23 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
 	__devm_clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
 			       NULL, (flags), (reg), (bit_idx),		      \
 			       (clk_gate_flags), (lock))
+/**
+ * devm_clk_hw_register_gate_parent_data - register a gate clock with the
+ * clock framework
+ * @dev: device that is registering this clock
+ * @name: name of this clock
+ * @parent_data: parent clk data
+ * @flags: framework-specific flags for this clock
+ * @reg: register address to control gating of this clock
+ * @bit_idx: which bit in the register controls gating of this clock
+ * @clk_gate_flags: gate-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+#define devm_clk_hw_register_gate_parent_data(dev, name, parent_data, flags,  \
+				       reg, bit_idx, clk_gate_flags, lock)    \
+	__devm_clk_hw_register_gate((dev), NULL, (name), NULL, NULL,	      \
+			       (parent_data), (flags), (reg), (bit_idx),      \
+			       (clk_gate_flags), (lock))
 void clk_unregister_gate(struct clk *clk);
 void clk_hw_unregister_gate(struct clk_hw *hw);
 int clk_gate_is_enabled(struct clk_hw *hw);
-- 
2.33.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ