linux-kernel - Re: [PATCH v1 11/11] mfd: intel_soc_pmic

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Message-ID: <YrrL+Mil/B1Gh5VN@smile.fi.intel.com>
Date:   Tue, 28 Jun 2022 12:38:00 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Lee Jones <lee.jones@...aro.org>
Cc:     linux-kernel@...r.kernel.org, Andy Shevchenko <andy@...nel.org>
Subject: Re: [PATCH v1 11/11] mfd: intel_soc_pmic_bxtwc: Fix spelling in the
 comment

On Mon, Jun 27, 2022 at 10:33:17AM +0100, Lee Jones wrote:
> On Thu, 16 Jun 2022, Andy Shevchenko wrote:

...

> > - * Copyright (C) 2015 Intel Corporation. All rights reserved.
> > + * Copyright (C) 2015-2017, 2022 Intel Corporation. All rights reserved.
> 
> I do not profess to be an expert.  What happened between 2017-2022?

Nothing?

I mean that before I become a reviewer/maintainer of this code I have no
evidence that anyone at Intel worked on the code (I mean really working,
not some whitespace cleanup). After that I don't remember I was doing
anything (important) either.

...

> > -	 * There is known hw bug. Upon reset BIT 5 of register
> > +	 * There is known HW bug. Upon reset BIT 5 of register
> 
> You may as well fix the grammar while you're at it.

Any suggestion from a native speaker? I can propose a few changes, but I'm
totally unsure.

> >  	 * BXTWC_CHGR_LVL1_IRQ is 0 which is the expected value. However,
> >  	 * later it's set to 1(masked) automatically by hardware. So we
> > -	 * have the software workaround here to unmaksed it in order to let
> > -	 * charger interrutp work.
> > +	 * have the software workaround here to unmasked it in order to let
> > +	 * charger interrupt work.
> 
> Likewise.

Likewise.

-- 
With Best Regards,
Andy Shevchenko