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Message-ID: <CAMuHMdVaVtTYO1bmNq_g3X8GWcrp7sAKop+ackCijhEV=Q4gmA@mail.gmail.com>
Date: Tue, 28 Jun 2022 11:48:01 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
linux-clk <linux-clk@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH 2/2] clk: renesas: r9a07g043: Add support for RZ/Five SoC
On Wed, Jun 22, 2022 at 8:17 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Renesas RZ/Five SoC has almost the same clock structure compared to the
> Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.c file to add support for
> RZ/Five SoC.
>
> This patch splits up the clocks and reset arrays for RZ/G2UL and RZ/Five
> SoC using #ifdef CONFIG_ARM64 and #ifdef CONFIG_RISCV checks.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk-for-v5.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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