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Message-ID: <20220629101744.GB882746@ls.amr.corp.intel.com>
Date:   Wed, 29 Jun 2022 03:17:44 -0700
From:   Isaku Yamahata <isaku.yamahata@...il.com>
To:     Sagi Shahar <sagis@...gle.com>
Cc:     "Yamahata, Isaku" <isaku.yamahata@...el.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, isaku.yamahata@...il.com,
        Paolo Bonzini <pbonzini@...hat.com>,
        Erdem Aktas <erdemaktas@...gle.com>,
        Sean Christopherson <seanjc@...gle.com>
Subject: Re: [RFC PATCH v6 093/104] KVM: TDX: Handle TDX PV MMIO hypercall

On Tue, Jun 14, 2022 at 11:08:16AM -0700,
Sagi Shahar <sagis@...gle.com> wrote:

> On Thu, May 5, 2022 at 11:16 AM <isaku.yamahata@...el.com> wrote:
> >
> > From: Sean Christopherson <sean.j.christopherson@...el.com>
> >
> > Export kvm_io_bus_read and kvm_mmio tracepoint and wire up TDX PV MMIO
> > hypercall to the KVM backend functions.
> >
> > kvm_io_bus_read/write() searches KVM device emulated in kernel of the given
> > MMIO address and emulates the MMIO.  As TDX PV MMIO also needs it, export
> > kvm_io_bus_read().  kvm_io_bus_write() is already exported.  TDX PV MMIO
> > emulates some of MMIO itself.  To add trace point consistently with x86
> > kvm, export kvm_mmio tracepoint.
> >
> > Signed-off-by: Sean Christopherson <sean.j.christopherson@...el.com>
> > Signed-off-by: Isaku Yamahata <isaku.yamahata@...el.com>
> > Reviewed-by: Paolo Bonzini <pbonzini@...hat.com>
> > ---
> >  arch/x86/kvm/vmx/tdx.c | 114 +++++++++++++++++++++++++++++++++++++++++
> >  arch/x86/kvm/x86.c     |   1 +
> >  virt/kvm/kvm_main.c    |   2 +
> >  3 files changed, 117 insertions(+)
> >
> > diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
> > index ee0cf5336ade..6ab4a52fc9e9 100644
> > --- a/arch/x86/kvm/vmx/tdx.c
> > +++ b/arch/x86/kvm/vmx/tdx.c
> > @@ -1057,6 +1057,118 @@ static int tdx_emulate_io(struct kvm_vcpu *vcpu)
> >         return ret;
> >  }
> >
> > +static int tdx_complete_mmio(struct kvm_vcpu *vcpu)
> > +{
> > +       unsigned long val = 0;
> > +       gpa_t gpa;
> > +       int size;
> > +
> > +       WARN_ON(vcpu->mmio_needed != 1);
> > +       vcpu->mmio_needed = 0;
> > +
> > +       if (!vcpu->mmio_is_write) {
> > +               gpa = vcpu->mmio_fragments[0].gpa;
> > +               size = vcpu->mmio_fragments[0].len;
> > +
> > +               memcpy(&val, vcpu->run->mmio.data, size);
> > +               tdvmcall_set_return_val(vcpu, val);
> > +               trace_kvm_mmio(KVM_TRACE_MMIO_READ, size, gpa, &val);
> > +       }
> > +       return 1;
> > +}
> > +
> > +static inline int tdx_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, int size,
> > +                                unsigned long val)
> > +{
> > +       if (kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, gpa, size, &val) &&
> > +           kvm_io_bus_write(vcpu, KVM_MMIO_BUS, gpa, size, &val))
> > +               return -EOPNOTSUPP;
> > +
> > +       trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, size, gpa, &val);
> > +       return 0;
> > +}
> > +
> > +static inline int tdx_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, int size)
> > +{
> > +       unsigned long val;
> > +
> > +       if (kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev, gpa, size, &val) &&
> > +           kvm_io_bus_read(vcpu, KVM_MMIO_BUS, gpa, size, &val))
> > +               return -EOPNOTSUPP;
> > +
> > +       tdvmcall_set_return_val(vcpu, val);
> > +       trace_kvm_mmio(KVM_TRACE_MMIO_READ, size, gpa, &val);
> > +       return 0;
> > +}
> > +
> > +static int tdx_emulate_mmio(struct kvm_vcpu *vcpu)
> > +{
> > +       struct kvm_memory_slot *slot;
> > +       int size, write, r;
> > +       unsigned long val;
> > +       gpa_t gpa;
> > +
> > +       WARN_ON(vcpu->mmio_needed);
> > +
> > +       size = tdvmcall_a0_read(vcpu);
> > +       write = tdvmcall_a1_read(vcpu);
> > +       gpa = tdvmcall_a2_read(vcpu);
> > +       val = write ? tdvmcall_a3_read(vcpu) : 0;
> > +
> > +       if (size != 1 && size != 2 && size != 4 && size != 8)
> > +               goto error;
> > +       if (write != 0 && write != 1)
> > +               goto error;
> > +
> > +       /* Strip the shared bit, allow MMIO with and without it set. */
> > +       gpa = gpa & ~gfn_to_gpa(kvm_gfn_shared_mask(vcpu->kvm));
> > +
> > +       if (size > 8u || ((gpa + size - 1) ^ gpa) & PAGE_MASK)
> > +               goto error;
> > +
> > +       slot = kvm_vcpu_gfn_to_memslot(vcpu, gpa_to_gfn(gpa));
> > +       if (slot && !(slot->flags & KVM_MEMSLOT_INVALID))
> > +               goto error;
> > +
> > +       if (!kvm_io_bus_write(vcpu, KVM_FAST_MMIO_BUS, gpa, 0, NULL)) {
> > +               trace_kvm_fast_mmio(gpa);
> > +               return 1;
> > +       }
> > +
> > +       if (write)
> > +               r = tdx_mmio_write(vcpu, gpa, size, val);
> > +       else
> > +               r = tdx_mmio_read(vcpu, gpa, size);
> > +       if (!r) {
> > +               /* Kernel completed device emulation. */
> > +               tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_SUCCESS);
> > +               return 1;
> > +       }
> > +
> > +       /* Request the device emulation to userspace device model. */
> > +       vcpu->mmio_needed = 1;
> > +       vcpu->mmio_is_write = write;
> > +       vcpu->arch.complete_userspace_io = tdx_complete_mmio;
> > +
> > +       vcpu->run->mmio.phys_addr = gpa;
> > +       vcpu->run->mmio.len = size;
> > +       vcpu->run->mmio.is_write = write;
> > +       vcpu->run->exit_reason = KVM_EXIT_MMIO;
> > +
> > +       if (write) {
> > +               memcpy(vcpu->run->mmio.data, &val, size);
> > +       } else {
> > +               vcpu->mmio_fragments[0].gpa = gpa;
> > +               vcpu->mmio_fragments[0].len = size;
> > +               trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, size, gpa, NULL);
> > +       }
> > +       return 0;
> > +
> > +error:
> > +       tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_SUCCESS);
> 
> We should return an error code here.

Yes, I'll fix it as follows. Thanks for catching it.

 error:
-       tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_SUCCESS);
+       tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_INVALID_OPERAND);
        return 1;
 }

-- 
Isaku Yamahata <isaku.yamahata@...il.com>

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