linux-kernel - [PATCH 1/2] dt-bindings: reset: mt8195: Add resets for PCIE controllers

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Date:   Wed, 29 Jun 2022 12:52:04 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     mturquette@...libre.com
Cc:     sboyd@...nel.org, matthias.bgg@...il.com, p.zabel@...gutronix.de,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        angelogioacchino.delregno@...labora.com, wenst@...omium.org,
        chun-jie.chen@...iatek.com, miles.chen@...iatek.com,
        rex-bc.chen@...iatek.com, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: [PATCH 1/2] dt-bindings: reset: mt8195: Add resets for PCIE controllers

Add the reset index for PCIe P0 and P1 (PCIe0, PCIe1) on MT8195.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
 include/dt-bindings/reset/mt8195-resets.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
index c87ba621e72e..5471468c43b7 100644
--- a/include/dt-bindings/reset/mt8195-resets.h
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -31,6 +31,8 @@
 #define MT8195_INFRA_RST0_THERM_CTRL_SWRST     0
 #define MT8195_INFRA_RST3_THERM_CTRL_PTP_SWRST 1
 #define MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST 2
+#define MT8195_INFRA_RST2_PCIE_P0_SWRST        3
+#define MT8195_INFRA_RST2_PCIE_P1_SWRST        4
 
 /* VDOSYS1 */
 #define MT8195_VDOSYS1_SW0_RST_B_SMI_LARB2                     0
-- 
2.35.1