lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20220629124403.18122-1-yf.wang@mediatek.com>
Date:   Wed, 29 Jun 2022 20:44:03 +0800
From:   <yf.wang@...iatek.com>
To:     <yong.wu@...iatek.com>
CC:     <Libo.Kang@...iatek.com>, <iommu@...ts.linux-foundation.org>,
        <isaacm@...eaurora.org>, <joro@...tes.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>, <matthias.bgg@...il.com>,
        <miles.chen@...iatek.com>, <ning.li@...iatek.com>,
        <quic_c_gdjako@...cinc.com>, <robin.murphy@....com>,
        <sven@...npeter.dev>, <will@...nel.org>,
        <wsd_upstream@...iatek.com>, <yf.wang@...iatek.com>
Subject: Re: [PATCH v10 1/2] iommu/io-pgtable-arm-v7s: Add a quirk to allow pgtable PA up to 35bit

On Wed, 2022-06-22 at 09:28 +0800, Yong Wu wrote:
> On Thu, 2022-06-16 at 20:07 +0800, yf.wang@...iatek.com wrote:
> > From: Yunfei Wang <yf.wang@...iatek.com>
> > 
> > Single memory zone feature will remove ZONE_DMA32 and ZONE_DMA and
> > cause pgtable PA size larger than 32bit.
> > 
> > Since Mediatek IOMMU hardware support at most 35bit PA in pgtable,
> > so add a quirk to allow the PA of pgtables support up to bit35.
> > 
> > Signed-off-by: Ning Li <ning.li@...iatek.com>
> > Signed-off-by: Yunfei Wang <yf.wang@...iatek.com>
> > ---
> >  drivers/iommu/io-pgtable-arm-v7s.c | 67 +++++++++++++++++++++++---
> > --
> > --
> >  include/linux/io-pgtable.h         | 15 ++++---
> >  2 files changed, 63 insertions(+), 19 deletions(-)
> 
> [...]
> 
> >  	/* TTBR */
> > -	cfg->arm_v7s_cfg.ttbr = virt_to_phys(data->pgd) |
> > ARM_V7S_TTBR_S |
> > +	paddr = virt_to_phys(data->pgd);
> > +	cfg->arm_v7s_cfg.ttbr = paddr | ARM_V7S_TTBR_S |
> >  				(cfg->coherent_walk ? (ARM_V7S_TTBR_NOS
> > > 
> > 
> >  				 ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBW
> > A) |
> >  				 ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBW
> > A)) :
> >  				(ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_NC)
> > > 
> > 
> >  				 ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_NC)
> > ));
> > +
> > +	if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT)
> > +		cfg->arm_v7s_cfg.ttbr = (paddr & GENMASK(31, 7)) |
> > +					upper_32_bits(paddr);
> 
> If we keep ttbr u32, we have to put the special logic here. This line
> is ok for all the MediaTek cases, not only for this quirk. It means:
> 
>     if (arm_v7s_is_mtk_enabled(cfg))
>            cfg->arm_v7s_cfg.ttbr = (virt_to_phys(data->pgd) &
> GENMASK(31, 7)) | upper_32_bits(paddr);
>     else
>            xxx
>  
>      Then we don't need add "& MMU_PT_ADDR_MASK" in mtk_iommu.c since
> you have done it here.
> 

Hi Yong,
Thanks for your suggestion, PATCH v11 version will modify it.

Thanks,
Yunfei.

> > +
> >  	return &data->iop;
> >  

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ